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4.5.3

Illegal Slot Instruction

An instruction located immediately after a delayed branch instruction is called an “instruction

placed in a delay slot.” If an undefined instruction is located in a delay slot, illegal slot instruction

exception processing begins executing when the undefined code is decoded. Illegal slot instruction

exception processing also begins when the instruction located in the delay slot is an instruction

that rewrites the program counter. In this case, exception processing begins when the instruction

that rewrites the PC is decoded. The CPU performs illegal slot exception processing as follows:

1. Saves the status register onto the stack.

2. Pushes the program counter value onto the stack. The PC value saved is the branch destination

address of the delayed branch instruction immediately before the instruction that contains the

undefined code or rewrites the PC.

3. Fetches an exception processing service routine start address from the vector table

corresponding to the exception that occurred, branches to that address and the program starts

executing. The branch is not a delayed branch.

4.5.4

General Illegal Instructions

If an undefined instruction located other than a delay slot (immediately after a delayed branch

instruction) is decoded, general illegal instruction exception processing is executed. The CPU

follows the same procedure as for illegal slot exception processing, except that the program

counter (PC) value pushed on the stack in general illegal instruction exception processing is the

top address of the illegal instruction with the undefined code.

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