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7643 bảng dữ liệu(PDF) 332 Page - Renesas Technology Corp |
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7643 bảng dữ liệu(HTML) 332 Page - Renesas Technology Corp |
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332 / 424 page  Rev.2.00 Aug 28, 2006 page 9 of 98 7643 Group REJ09B0133-0200 APPENDIX 3.1 Electrical characteristics IOH = –1 mA “H” output voltage P00–P07, P10–P17, P20–P27, P30–P37, P40–P44, P50–P57, P60–P67, P70–P74, P80–P87 “H” output voltage USB D+, USB D- Limits V Parameter Min. VCC–1.0 Typ. Max. Symbol Unit Test conditions VOH VOH USB+, and USB- pins pull-down via a resistor of 15 k Ω ± 5 % USB+ pin pull-up to Ext. Cap. pin via a resistor of 1.5 k Ω ± 5 % IOL = 1 mA VOL “L” output voltage P00–P07, P10–P17, P20–P27, P30–P37, P40–P44, P50–P57, P60–P67, P70–P74, P80–P87 “L” output voltage USB D+, USB D- USB+, and USB- pins pull-down via a resistor of 15 k Ω ± 5 % USB+ pin pull-up to Ext. Cap. pin via a resistor of 1.5 k Ω ± 5 % VT+–VT- Hysteresis INT0, INT1, RDY, HOLD, P20–P27 (Note 1) Hysteresis URXD, SCLK, SRXD, SRDY, CTS Hysteresis RESET “H” input current P00–P07, P10–P17, P20–P27, P30–P37, P40–P44, P50–P57, P60–P67, P70–P74, P80–P87 “H” input current RESET, CNVSS “H” input current XIN “H” input current XCIN “L” input current P00–P07, P10–P17, P30–P37, P40–P44, P50–P57, P60–P67, P70–P74, P80–P87 “L” input current RESET “L” input current CNVSS “L” input current XIN “L” input current XCIN “L” input current P20–P27 RAM hold voltage VT+–VT- VT+–VT- IIH IIH IIH IIH IIL IIL IIL IIL IIL IIL VI = VCC VI = VSS VI = VSS Pull-ups “off” VCC = 3.0 V, VI = VSS Pull-ups “on” When clock is stopped 2.8 –10 2.0 0.3 0.3 0.3 9.0 –9.0 –20 3.6 1.0 0.3 5.0 5.0 20 5.0 –5.0 –5.0 –20 –20 –5.0 –5.0 V V V V V V µA µA µA µA µA µA µA µA µA µA µA VOL –50 V VRAM 0 Note 1: This spec is hysteresis of key input interrupt. 3.1.7 Electrical characteristics In Vcc = 3 V Table 3.1.8 Electrical characteristics (1) (Vcc = 3.0 to 3.6 V, Vss = 0 V, Ta = –20 to 70°C, unless otherwise noted) |
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