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7643 bảng dữ liệu(PDF) 264 Page - Renesas Technology Corp |
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7643 bảng dữ liệu(HTML) 264 Page - Renesas Technology Corp |
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264 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 143 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.6 USB Fig. 2.6.38 Control procedure (USB function interrupt routine) USB function interrupt routine RAM1 RAM2 (Address 5216) ? (Address 5316) ? RTI Push registers to stack Pop registers USB endpoint x IN interrupt routine RAM1,bit0=1 or RAM1,bit2=1 or RAM1,bit4=1 RAM1,bit1=1 or RAM1,bit3=1 USB endpoint x OUT interrupt routine RAM2,bit5=1 USB reset interrupt routine RAM2,bit6=1 USB resume interrupt routine RAM2,bit7=1 USB suspend interrupt routine • In the initial setting routine, enable each interrupt by ICONA (address 000516), USBIE1 (address 005416) and USBIE2 (address 005516). • USB interrupt status registers 1 and 2 cleared Set “1” again to the corresponding bits of USBIS1, USBIS2 to clear these bits. Read and push in the following order; USBIS1 → RAM1, USBIS2 → RAM2 Write in the following order; RAM1 → USBIS1, RAM2 → USBIS2 (Note 1) Note 1: When the USB block is enabled (USBC7=1) and USB clock is enabled (USBC5=1), writing to USB related registers (address 005016 to 006216) except USBC can be enabled. In the case of the resume interrupt, clear the USB resume signal interrupt status flag in the USB resume interrupt routine. |
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