7643 datasheet(135/424 Pages) RENESAS

135 / 424 page

Rev.2.00

Aug 28, 2006

page 14 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.2 Timer

Fig. 2.2.4 Structure of Interrupt request register B

Interrupt request register B

b7 b6 b5 b4 b3 b2 b1 b0

Interrupt request register B

(IREQB : address 0316)

Name

Functions

At reset R W

UART summing error

interrupt request bit

Timer 1 interrupt request

bit

0 : No interrupt request issued

1 : Interrupt request issued

0 : No interrupt request issued

1 : Interrupt request issued

0 : No interrupt request issued

1 : Interrupt request issued

Timer 2 interrupt request

bit

✽

✽: “0” can be set by software, but “1” cannot be set.

Nothing is arranged for these bits.

When these bits are read out, the contents are undefined.

These bits are “0” at write.

Fig. 2.2.5 Structure of Interrupt request register C

Interrupt request register C

b7 b6 b5 b4 b3 b2 b1 b0

Interrupt request register C

(IREQC : address 0416)

Name

Functions

At reset R W

Timer 3 interrupt request

bit

Serial I/O interrupt request

bit

Key input interrupt request

bit

0 : No interrupt request issued

1 : Interrupt request issued

0 : No interrupt request issued

1 : Interrupt request issued

0 : No interrupt request issued

1 : Interrupt request issued

✽

✽: “0” can be set by software, but “1” cannot be set.

Nothing is arranged for these bits.

When these bits are read out, the contents are undefined.

These bits are “0” at write.

Nothing is arranged for these bits.

When these bits are read out, the contents are undefined.

These bits are “0” at write.

Nothing is arranged for this bit.

Fix this bit to “0”.

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