M16CSLASH29 datasheet(351/499 Pages) RENESAS

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19. Programmable I/O Ports

page 327

Figure 19.11 NDDR and P17DDR Registers

NMI Digital Debounce Register (1,2)

Symbol

Address

After Reset

NDDR

033E16

FF16

Function

Setting Range

0016 to FF16

If the set value =n,

- n = 0 to FE16; a signal with pulse width, greater than

(n+1)/f8, is input into NMI / SD

- n = FF16; the digital debounce filter is disabled and all

signals are input

P17 Digital Debounce Register(1)

Symbol

Address

After Reset

P17DDR

033F16

FF16

Function

Setting Range

0016 to FF16

If the set value =n,

- n = 0 to FE16; a signal with pulse width, greater than

(n+1)/f8, is input into INPC17/ INT5

- n = FF16; the digital debounce filter is disabled and all

signals are input

NOTES:

1. Set the PACR register by the next instruction after setting the PRC2 bit in the PRCR register to 1 (write

enable).

2. When using the NMI interrupt to exit from stop mode, set the NDDR registert to FF16 before entering

stop mode.

NOTE:

1. When using the INT5 interrupt to exit from stop mode, set the P17DDR registert to FF16 before entering

stop mode.

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