M37274EFSP datasheet(57/148 Pages) RENESAS

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MITSUBISHI MICROCOMPUTERS

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

M37274EFSP

PRELIMINARY

Notice:

This

is not

a final

specification.

Some

paramentic

limits

are

subject

to change.

(4) I2C Control Register

The I2C control register (address 00F916) controls the data commu-

nication format.

s Bits 0 to 2: Bit Counter (BC0–BC2)

These bits decide the number of bits for the next 1-byte data to be

transmitted. An interrupt request signal occurs immediately after the

number of bits specified with these bits are transmitted.

When a START condition is received, these bits become “0002” and

the address data is always transmitted and received in 8 bits.

s Bit 3: I2C Interface Use Enable Bit (ESO)

This bit enables usage of the multimaster I2C BUS interface. When

this bit is set to “0,” the use disable status is provided, so the SDA

and the SCL become high-impedance. When the bit is set to “1,” use

of the interface is enabled.

When ESO = “0,” the following is performed.

• PIN = “1,” BB = “0” and AL = “0” are set (they are bits of the I2C

status register at address 00F816 ).

• Writing data to the I2C data shift register (address 00F616) is dis-

abled.

s Bit 4: Data Format Selection Bit (ALS)

This bit decides whether or not to recognize slave addresses. When

this bit is set to “0,” the addressing format is selected, so that ad-

dress data is recognized. When a match is found between a slave

address and address data as a result of comparison or when a gen-

eral call (refer to “(5) I2C Status Register,” bit 1) is received, trans-

mission processing can be performed. When this bit is set to “1,” the

free data format is selected, so that slave addresses are not recog-

nized.

s Bit 5: Addressing Format Selection Bit (10BIT SAD)

This bit selects a slave address specification format. When this bit is

set to “0,” the 7-bit addressing format is selected. In this case, only

the high-order 7 bits (slave address) of the I2C address register (ad-

dress 00F716) are compared with address data. When this bit is set

to “1,” the 10-bit addressing format is selected, all the bits of the I2C

address register are compared with address data.

s Bits 6 and 7: Connection Control Bits between I2C-BUS Interface

and Ports (BSEL0, BSEL1)

These bits controls the connection between SCL and ports or SDA

and ports (refer to Figure 55).

Fig. 54. Connection Port Control by BSEL0 and BSEL1

“0”

“1” BSEL0

SCL1/P11

SCL2/P12

“0”

“1” BSEL1

“0”

“1” BSEL0

SDA1/P13

SDA2/P14

“0”

“1” BSEL1

Multi-master

I2C-BUS

interface

SCL

SDA

Note: When using multi-master I2C-BUS interface, set bits 3 and

4 of the serial I/O mode register (address 021316) to “1.”

Moreover, set the corresponding direction register to “1” to

use the port as multi-master I2C-BUS interface.

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