M37274EFSP datasheet(44/148 Pages) RENESAS

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

M37274EFSP

PRELIMINARY

Notice:

This

is not

a final

specification.

Some

paramentic

limits

are

subject

to change.

MITSUBISHI MICROCOMPUTERS

Selection of field to be sliced data

In the case of the main data slice line, the field to be sliced data is

selected by bits 2 and 1 of the data slicer control register 1 (address

00EA16). In the case of the sub-data slice line, the field is selected

by bits 2 and 1 of the data slicer control register 3. When bit 2 of

the data slicer control register 1 is set to “1,” it is possible to slice

data of both fields (refer to Figures 32 to 34).

Specification of line to set slice voltage

The reference voltage for slicing (slice voltage) is generated by

integrating the amplitude of the clock run-in pulse in the particular

line (refer to Table 4).

Field determination

The field determination flag can be read out by bit 5 of the data

slicer control register 1. This flag charge at the falling edge of

Vsep.

Fig. 38. Signals in Vertical Blanking Interval

(5) Data Slice Line Specification Circuit

Specification of data slice line

M37274MA-XXXSP has 2 data slice line specification circuits for

slicing arbitrary 2 Hsep in 1 field. The following 2 data slice lines

are specified .

This line is specified by the caption position register (address

00E016).

<Sub-data slice line>

This line is specified by the data slicer control register 3 (address

00EB16).

The counter is reset at the falling edge of Vsep and is incremented

by 1 every Hsep pulse. When the counter value matched the value

specified by bits 4 to 0 of the caption position register (in case of

the sub-data slice line, by bits 3 to 7 of the data slicer control register

3), this Hsep is sliced.

The values of “0016” to “1F16” can be set in the caption position

shows the signals in the vertical blanking interval. Figure 39 shows

the structure of the caption position register.

Video signal

Vertical blanking interval

Composite

video signal

Count value to be set in the caption position register (“11 16” in this case)

Hsep

Vsep

Hsep

Magnified

drawing

Clock run-in

Start bit + 16-bit data

Start bit

Time to be set in the

start bit position register

Composite video

signal

min. max.

Line 21

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