NRF52810-QFAA-R datasheet(276/483 Pages) NORDIC

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Peripherals

The ACC register will accumulate all valid values (1/-1) written to the SAMPLE register. This can be useful

for preventing hard real-time requirements from being enforced on the application. When using the

ACC register the application does not need to read every single sample from the SAMPLE register, but

can instead fetch the ACC register whenever it fits the application. The ACC register will always hold the

relative movement of the external mechanical device since the previous clearing of the ACC register.

Sample values indicating a double transition (2) will not be accumulated in the ACC register.

An ACCOF event will be generated if the ACC receives a SAMPLE value that would cause the register

to overflow or underflow. Any SAMPLE value that would cause an ACC overflow or underflow will be

discarded, but any samples not causing the ACC to overflow or underflow will still be accepted.

The accumulator ACCDBL accumulates the number of detected double transitions since the previous

clearing of the ACCDBL register.

The ACC and ACCDBL registers can be cleared by the READCLRACC and subsequently read using the

ACCREAD and ACCDBLREAD registers.

The ACC register can be separately cleared by the RDCLRACC and subsequently read using the ACCREAD

registers.

The ACCDBL register can be separately cleared by the RDCLRDBL and subsequently read using the

ACCDBLREAD registers.

The REPORTPER register allows automating the capture of several samples before it can send out a

REPORTRDY event in case a non-null displacement has been captured and accumulated, and a DBLRDY

event in case one or more double-displacements have been captured and accumulated. The REPORTPER

field in this register selects after how many samples the accumulators contents are evaluated to send (or

not) REPORTRDY and DBLRDY events.

Using the RDCLRACC task (manually sent upon receiving the event, or using the DBLRDY_RDCLRACC

shortcut), ACCREAD can then be read.

In case at least one double transition has been captured and accumulated, a DBLRDY event is sent. Using

the RDCLRDBL task (manually sent upon receiving the event, or using the DBLRDY_RDCLRDBL shortcut),

ACCDBLREAD can then be read.

6.13.5 Output/input pins

The QDEC uses a three-pin interface to the off-chip quadrature encoder.

These pins will be acquired when the QDEC is enabled in the ENABLE register. The pins acquired by the

QDEC cannot be written by the CPU, but they can still be read by the CPU.

The pin numbers to be used for the QDEC are selected using the PSEL.n registers.

6.13.6 Pin configuration

The Phase A, Phase B, and LED signals are mapped to physical pins according to the configuration specified

in the PSEL.A, PSEL.B, and PSEL.LED registers respectively.

If the CONNECT field value 'Disconnected' is specified in any of these registers, the associated signal will

not be connected to any physical pin. The PSEL.A, PSEL.B, and PSEL.LED registers and their configurations

are only used as long as the QDEC is enabled, and retained only as long as the device is in ON mode.

When the peripheral is disabled, the pins will behave as regular GPIOs, and use the configuration in their

respective OUT bit field and PIN_CNF[n] register.

To secure correct behavior in the QDEC, the pins used by the QDEC must be configured in the GPIO

peripheral as described in GPIO configuration before enabling peripheral on page 277 before enabling

the QDEC. This configuration must be retained in the GPIO for the selected IOs as long as the QDEC is

enabled.

4430_161 v1.0

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