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NRF52810-QFAA-R bảng dữ liệu(PDF) 19 Page - Nordic Semiconductor |
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NRF52810-QFAA-R bảng dữ liệu(HTML) 19 Page - Nordic Semiconductor |
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19 / 483 page  Core components UICR can only be written nWRITE number of times before an erase must be performed using ERASEUICR or ERASEALL. The time it takes to write a word to UICR is specified by tWRITE. The CPU is halted if the CPU executes code from the flash while the NVMC is writing to the UICR. 4.3.4 Erasing user information configuration registers (UICR) When erase is enabled, UICR can be erased using the ERASEUICR register. After erasing UICR all bits in UICR are set to 1. The time it takes to erase UICR is specified by tERASEPAGE. The CPU is halted if the CPU executes code from the flash while the NVMC performs the erase operation. 4.3.5 Erase all When erase is enabled, flash and UICR can be erased completely in one operation by using the ERASEALL register. ERASEALL will not erase the factory information configuration registers (FICR). The time it takes to perform an ERASEALL command is specified by tERASEALL The CPU is halted if the CPU executes code from the flash while the NVMC performs the erase operation. 4.3.6 Registers Base address Peripheral Instance Description Configuration 0x4001E000 NVMC NVMC Non-volatile memory controller Table 5: Instances Register Offset Description READY 0x400 Ready flag CONFIG 0x504 Configuration register ERASEPCR1 0x508 Register for erasing a page in code area. Equivalent to ERASEPAGE. Deprecated ERASEPAGE 0x508 Register for erasing a page in code area ERASEALL 0x50C Register for erasing all non-volatile user memory ERASEPCR0 0x510 Register for erasing a page in code area. Equivalent to ERASEPAGE. Deprecated ERASEUICR 0x514 Register for erasing user information configuration registers Table 6: Register Overview 4.3.6.1 READY Address offset: 0x400 Ready flag Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Id A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Id RW Field Value Id Value Description A R READY NVMC is ready or busy Busy 0 NVMC is busy (ongoing write or erase operation) Ready 1 NVMC is ready 4.3.6.2 CONFIG Address offset: 0x504 Configuration register 4430_161 v1.0 19 |
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