NRF52810-QFAA-R datasheet(382/483 Pages) NORDIC

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Peripherals

6.18.6.2 Serial Peripheral Interface Master (SPIM) timing specifications

Symbol

Description

Min.

Typ.

Max.

Units

tSPIM,CSCK

SCK period

tSPIM,RSCK,LD

SCK rise time, standard drivea

tRF,25pF

tSPIM,RSCK,HD

SCK rise time, high drivea

tHRF,25pF

tSPIM,FSCK,LD

SCK fall time, standard drivea

tRF,25pF

tSPIM,FSCK,HD

SCK fall time, high drivea

tHRF,25pF

tSPIM,WHSCK

SCK high timea

(0.5*tCSCK)

– tRSCK

tSPIM,WLSCK

SCK low timea

(0.5*tCSCK)

– tFSCK

tSPIM,SUMI

MISO to CLK edge setup time

tSPIM,HMI

CLK edge to MISO hold time

tSPIM,VMO

CLK edge to MOSI valid

tSPIM,HMO

MOSI hold time after CLK edge

tHMO

MSb

LSb

MSb

LSb

MOSI (out)

MISO (in)

CPOL=0

CPHA=0

tSUMI

tHMI

tRSCK

tFSCK

tCSCK

tWHSCK

tWLSCK

tVMO

CPOL=1

CPHA=0

CPOL=0

CPHA=1

CPOL=1

CPHA=1

Figure 100: SPIM timing diagram

6.19 SPIS — Serial peripheral interface slave with

EasyDMA

SPI slave (SPIS) is implemented with EasyDMA support for ultra low power serial communication from an

external SPI master. EasyDMA in conjunction with hardware-based semaphore mechanisms removes all

real-time requirements associated with controlling the SPI slave from a low priority CPU execution context.

a At 25pF load, including GPIO pin capacitance, see GPIO spec.

4430_161 v1.0

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