R7KA8D2AFDCAB datasheet(19/292 Pages) RENESAS

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Table 1.15

Pin functions (7 of 7)

Function

Signal

I/O

Description

Analog power

supply

AVCC0

Input

Analog voltage supply pin. This is used as the analog power supply for the

respective modules.

AVSS0

Input

Analog ground pin. This is used as the analog ground for the respective modules.

Supply this pin with the same voltage as the VSS pin.

VREFH

Input

Analog reference voltage supply pin for the ADC16H (unit 1) and D/A Converter.

Connect this pin to AVCC0 when not using the ADC16H (unit 1) and D/A Converter.

VREFL

Input

Analog reference ground pin for the ADC16H and D/A Converter. Connect this pin

to AVSS0 when not using the ADC16H (unit 1) and D/A Converter.

VREFH0

Input

Analog reference voltage supply pin for the ADC16H (unit 0). Connect this pin to

AVCC0 when not using the ADC16H (unit 0).

VREFL0

Input

Analog reference ground pin for the ADC16H. Connect this pin to AVSS0 when not

using the ADC16H (unit 0).

ADC16H

ANxxx

Input

Input pins for the analog signals to be processed by the A/D converter.

ADTRGm

Input

Input pins for the external trigger signals that start the A/D conversion, active-low.

ADSTm

Output AD conversion start

ADmFLAG1

Output AD conversion end

ADSYNC

Output Synchronization signal between units

DAC12

DAn

Output Output pins for the analog signals processed by the D/A converter.

ACMPHS

VCOUT

Output Comparator output pin

IVREFn

Input

Reference voltage input pins for comparator

IVCMPn

Input

Analog voltage input pins for comparator

I/O ports

Pmn

I/O

General-purpose input/output pins (m: port number, n: pin number)

P200

Input

General-purpose input pin

GLCDC

LCD_DATA23 to

LCD_DATA00

Output Data output pins for panel

LCD_TCON3 to

LCD_TCON0

Output Output pins for panel timing adjustment

LCD_CLK

Output Panel clock output pin

LCD_EXTCLK

Input

Panel clock source input pin

MIPI

VCC18_MIPI

Input

Power supply pin

AVCC_MIPI

Input

Analog power supply

VSS_MIPI

Input

Ground pin

MIPI_CL_P

Output DSI/CSI Clock Lane positive pin

MIPI_CL_N

Output DSI/CSI Clock Lane negative pin

MIPI_DL0_P

I/O

DSI/CSI Data Lane 0 positive pin

MIPI_DL0_N

I/O

DSI/CSI Data Lane 0 negative pin

MIPI_DL1_P

Output DSI/CSI Data Lane 1 positive pin

MIPI_DL1_N

Output DSI/CSI Data Lane 1 negative pin

DSI_TE

Input

DSI Tearing Effect pin

CEU

VIO_D15 to VIO_D0

Input

CEU data bus pins

VIO_CLK

Input

CEU clock pins

VIO_VD

Input

CEU vertical sync pins

VIO_HD

Input

CEU horizontal sync pins

VIO_FLD

Input

Field signal pins

RA8D2 Datasheet

1. Overview

R01DS0493EJ0130 Rev.1.30

Feb 27, 2026

Page 19 of 292

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