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STM32WB09XE bảng dữ liệu(PDF) 52 Page - STMicroelectronics

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Table 38. RSTN pin characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit.
VIL(RSTN)
RSTN input low level voltage
-
-
-
0.3 x VDD
V
VIH(RSTN)
RSTN input high level voltage
-
0.7 x VDD
-
-
Vhys(RSTN)
RSTN Schmitt trigger voltage hysteresis
-
-
200
-
mV
RPU
Weak pull-up equivalent resistor
VIN=GND
25
40
55
kΩ
Figure 13. Recommended RSTN pin protection
1. The external reset circuit protects the device against parasitic resets.
2. The user must ensure that the level on the RSTN pin can go below the VIL(RSTN) max. level specified in the
table, otherwise the reset is not taken into account by the device.
3. The external capacitor on RSTN must be placed as close as possible to the device.
6.3.18
ADC characteristics
Table 39. ADC characteristics (HSI must be set to PLL mode)
Symbol
Parameter
Test conditions
Min. Typ. Max.
Units
Ch_diff_num
Number of channels for
differential mode
VFQFPN32, WLCSP36
-
-
4
-
Ch_se_num
Number of channels for
single ended mode
VFQFPN32, WLCSP36
-
-
8
-
IBATADCBIAS
ADC biasing consumption at
battery
Biasing blocks turned on
-
145
-
µA
IBATADCACTIVE
ADC active consumption at
battery
ADC activated in differential mode
-
185
-
µA
VDDA
Analog supply voltage
-
1.2
-
1.32
V
RAIN
Input impedance
In DC
-
250
-
kΩ
Rin
Internal access resistance
VBOOST is enabled for VBAT < 2.7 V
-
-
550
Ω
Cin
Input sampling capacitor
-
-
4
-
pF
Ts
Sampling period
Default configuration
-
1
-
µs
Tsw
Sampling time
Default configuration
-
125
-
ns
DR
Output data rate
-
-
200
-
k samples/s
STM32WB09xE
Electrical characteristics
DS14210 - Rev 6
page 52/73



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