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STA333W bảng dữ liệu(PDF) 27 Page - STMicroelectronics |
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STA333W bảng dữ liệu(HTML) 27 Page - STMicroelectronics |
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27 / 42 page ![]() STA333W Register description 27/42 filter. If any channel receives 2048 consecutive zero value samples (regardless of fs) then that individual channel is muted if this function is enabled. 7.1.6 Configuration register E (address 0x04) Max power correction variable Max power correction Setting the MPC bit turns on special processing that corrects the STA50x power device at high power. This mode should lower the THD+N of a full DDX system at maximum power output and slightly below. If enabled, MPC is operational in all output modes except tapered (OM[1:0] = 01) and binary. When OCFG = 00, MPC will not effect channels 3 and 4, the line-out channels. Noise-shaper bandwidth selection AM mode enable The STA333W features a DDX processing mode that minimizes the amount of noise generated in frequency range of AM radio. This mode is intended for use when DDX is operating in a device with an AM tuner active. The SNR of the DDX processing is reduced to ~83 dB in this mode, which is still greater than the SNR of AM radio. D7 D6 D5 D4 D3 D2 D1 D0 SVE ZCE DCCV PWMS AME NSBW MPC MPCV 11000010 Table 26. Max power correction variable Bit R/W RST Name Description 0R/W 1MPCV 0: use standard MPC coefficient 1: use MPCC bits for MPC coefficient Table 27. Max power correction Bit R/W RST Name Description 1R/W 1MPC Setting of 1 enables STA50x correction for THD reduction near maximum power output. Table 28. Noise shaper bandwidth selection Bit R/W RST Name Description 2R/W 0NSBW 1: 3rd order NS 0: 4th order NS Table 29. AM mode enable Bit R/W RST Name Description 3R/W 0AME 0: normal DDX operation 1: AM reduction mode DDX operation |
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