STA333W datasheet(17/42 Pages) STMICROELECTRONICS

17 / 42 page

STA333W

I2C bus specification

17/42

6.3

Write operation

Following the START condition the master sends a device select code with the RW bit set

to 0. The STA333W acknowledges this and the writes for the byte of internal address. After

receiving the internal byte address the STA333W again responds with an

acknowledgement.

6.3.1

Byte write

In the byte write mode the master sends one data byte, this is acknowledged by the

STA333W. The master then terminates the transfer by generating a STOP condition.

6.3.2

Multi-byte write

The multi-byte write modes can start from any internal address. The master generating a

STOP condition terminates the transfer.

Figure 12.

Write mode sequence

Figure 13.

Read mode sequence

DEV-ADDR

ACK

START

SUB-ADDR

ACK

DATA IN

ACK

STOP

BYTE

WRITE

DEV-ADDR

ACK

START

SUB-ADDR

ACK

DATA IN

ACK

STOP

MULTIBYTE

WRITE

DATA IN

ACK

DEV-ADDR

ACK

START

DATA

NO ACK

STOP

CURRENT

ADDRESS

READ

DEV-ADDR

ACK

START

SUB-ADDR

ACK

DEV-ADDR

ACK

STOP

RANDOM

ADDRESS

READ

DATA

NO ACK

START

DEV-ADDR

ACK

START

DATA

ACK

DATA

ACK

STOP

SEQUENTIAL

CURRENT

READ

DATA

NO ACK

DEV-ADDR

ACK

START

SUB-ADDR

ACK

DEV-ADDR

ACK

SEQUENTIAL

RANDOM

READ

DATA

ACK

START

DATA

ACK

NO ACK

STOP

DATA

RW=

HIGH

STA333W bảng dữ liệu(PDF) 17 Page - STMicroelectronics

STA333W bảng dữ liệu(HTML) 17 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

bảng dữ liệu tải về

Link URL