ZIOL2201 datasheet(45/92 Pages) RENESAS

45 / 92 page

ZIOL2xxx Datasheet

April 26, 2016

Figure 3.14 Interrupt (INT_L pin) and Wake-up (WURQ_L pin) Signaling

reset OVL/OVT counter only

COM OFF if IRQ_LOCK_COM == 1

AUX

OFF if IRQ_LOCK_AUX == 1

Both

OFF if IRQ_LOCK_OVT == 1

(COM and

IRQ_POWER_FAIL == 1

AUX)

AND

(8x)

NOR

IRQ

INT_L pin

(low active)

MON_RST_LOCK_OVT

MON_RST_LOCK_COM

MON_RST_LOCK_AUX

MON_RST_WURQ

MON_RST_POWER_FAIL

reserved

MON_RST_LOCK_WURQ [16]

>S<

bit

reset

w / pulse

Memory

Control

IRQ_EN_LOCK_OVT

IRQ_EN_LOCK_COM

IRQ_EN_LOCK_AUX

IRQ_EN_EEPROM2_ERR

IRQ_EN_EEPROM_ERR

IRQ_EN_VALID_FLAG_ERR

IRQ_EN_WURQ

IRQ_EN_POWER_FAIL

IRQ_ENABLE [0]

>C<

bit

reset

r / w

WURQ_L pin config

DC/DC converter

AUX_LOCK Circuit

COM_LOCK Circuit

OVT_LOCK Circuit

Power Fail Detection

set

clear

set

clear

set

clear

set

clear

A write access to the MON_RST_LOCK_WURQ/MON_RST_COUNT

partial functionality assigned register bit if the write-data contain a 1 at to

this bit corresponding bit position.

For example, writing 0x08 to MON_RST_LOCK_WURQ will reset a

detected WURQ exception but not a possibly performed lock with respect to

the COM-channel, AUX-channel, and the over-temp detection circuit.

WURQ

INT_L pin

(low active)

INL_L pin config

WURQDETECT_LVL

WURQDETECT_CURRENT

WURQSOURCE

IRQ_NOREG

BOTH_CHANNEL_LOCK

DCDC_READY_DELAY

WURQ_PAD_MODE

IRQ_PAD_MODE

IRQ_WURQ_CTRL [14]

>C<

bit

reset

r / w

Driver OFF

Partial Reset via SPI

IRQ_LOCK_OVT

IRQ_LOCK_COM

IRQ_LOCK_AUX

IRQ_EEPROM2_ERR

IRQ_EEPROM_ERR

IRQ_VALID_FLAG_ERR

IRQ_WURQ

IRQ_POWER_FAIL

IRQ_STATUS [18]

>S<

bit

reset

r / rst

Internal IC

Sensors for

Overload and

Over-

temperature

dectection

lock circuit reset (influences also reg[18])

MON_RST_OVT

MON_RST_COM_LS

MON_RST_COM_HS

MON_RST_AUX_LS

MON_RST_AUX_HS

reserved

MON_RST_COUNT [17]

>S<

bit

reset

w / pulse

Driver

Protection

Circuit

State Signals

WURQ Detection

set

clear

The WURQ indication is a dedicated IO-Link functionality. A WURQ event is indicated if an over current situation

with a determined timing – regarding to IO-Link Communication Specification happened on one of the output

driver stages (refer to chapter 3.3.4, 3.3.10.1 and 8). A WURQ event will be created if there is either a timely

limited (typical 80µs) different logical value between the logical output value of the driver and the received logical

value from the line or an also timely limited (typical 80µs) over-current at the considered channel. It can be

configured whether the first or the last or both conditions lead to a WURQ event.

3.3.10.2. IC Lock Mode Configuration and Monitoring

If the current through the output driver exceeds the configured limit, an exception will be generated. In addition to

that and depending on the Ics configuration, the lock mode operation which corresponds to the overloaded

channel can be performed (refer to Figure 3.15 and Figure 3.16). The above mentioned lock mode operation is

activated if either one driver stage (HS or LS) or both drivers stages (HS and LS stage) are overloaded, means

the output current exceeds the configured limit.

If the event occurs, the corresponding driver stage will be set to a save state, meaning it will be disabled.

The Lock mode configuration as shown in the following figures (Figure 3.15, Figure 3.16, Figure 3.17) is based on

configurable current limits and time periods.

1 The in this an in the following figures used symbols for the IC registers are explained in Figure 9.1.

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