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SMS01GAF bảng dữ liệu(PDF) 17 Page - Numonyx B.V

tên linh kiện SMS01GAF
Giải thích chi tiết về linh kiện  64 MByte, 128 MByte, 256 MByte 512 MByte and 1 GByte, 3.3V Supply Secure Digital??Card
PDF  61 Pages
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nhà sản xuất  NUMONYX [Numonyx B.V]
Trang chủ  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

SMS01GAF bảng dữ liệu(HTML) 17 Page - Numonyx B.V

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SMSxxxAF, SMSxxxFF, SMSxxxBF
Secure digital memory card interface
17/61
Data transfer can be configured by the host to use single or multiple data lines (provided that
the card supports this feature).
A busy signal on DAT0 is used to indicate that a Block Write operation is ongoing (see
Figure 7). The same busy signaling is used regardless of the number of data lines used to
transfer the data.
Response tokens (see Figure 9) have four coding schemes depending on their content. The
token length is either 48 or 136 bits (See SD Memory Card Specification, Chapter 4.5 for
detailed definitions of the commands and responses). The CRC protection algorithm for
data block is a 16-bit CCITT polynomial (see SD Memory Card Specification, chapter 4.5).
On the CMD line, the MSB bit is transmitted first and the LSB bit last. When the wide bus
option is used, the data is transferred 4 bits at a time (refer to Figure 10). Start bits, End bits
and CRC bits, are transmitted on all the DAT lines used. CRC bits are calculated and
checked for every DAT line individually. The CRC status response and Busy indication are
sent by the card to the host on DAT0 only (DAT1-DAT3 are Don’t Care).
Figure 5.
"No Response" and "No Data" operations
Figure 6.
(Multiple) Block Read operation
Command
Response
Command
CMD
DAT
ai10031
Operation
(no response)
Operation
(no data)
from Card
to Host
from Host
to Card
from Host
to Card
Response
Command
CMD
DAT
ai10032
Block Read operation
Data Stop operation
Response
Command
Data Block CRC
Data Block CRC
Data Block CRC
Multiple Block Read operation
from Card
to Host
from Host
to Card
Data from
Card to Host
STOP_TRANSMISSION command
stops data transfer



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