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SMS01GAF bảng dữ liệu(PDF) 36 Page - Numonyx B.V |
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SMS01GAF bảng dữ liệu(HTML) 36 Page - Numonyx B.V |
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36 / 61 page ![]() Timings SMSxxxAF, SMSxxxFF, SMSxxxBF 36/61 Figure 17. Identification Sequence 6.1.2 Card Relative Address Timings The SD Memory Card timings for CMD3 (SEND_RELATIVE_ADDR) are given in Figure 18. The minimum delay between the host command and the card response is NCR clock cycles. Figure 18. SEND_RELATIVE_ADDRESS Command 6.1.3 Data Transfer Mode After publishing its RCA the card switches to the Data Transfer mode. The command is followed by two Z-bits (to leave time for the bus to switch direction) and then by P-bits pushed by the responding card as shown in Figure 19. The timing diagram presented in Figure 19 applies to all host commands followed by card responses, and to ACMD41 and CMD2 commands. Figure 19. Response (Data Transfer Mode) 6.1.4 Last Card Response, Next Host Command Timings After receiving the last card response, the host can start the next command transmission after NRC clock cycles as shown in Figure 20. The timing diagram presented in Figure 20 applies to any host command. Figure 20. Response End To Next CMD Start (Data Transfer Mode) S T CONTENT CRC E Z Z P *** P S T CONTENT Z Z Z Host Command CID or OCR NID Cycles ai10046 CMD S T CONTENT CRC E Z Z P *** P S T Z Z Z Host Command Response NCR Cycles ai10047 CONTENT CRC E CMD S T CONTENT CRC E Z Z P *** P S T Z Z Z Host Command Response NCR Cycles ai10047 CONTENT CRC E CMD S T CONTENT CRC E Z ****** Z S T Response Host Command NRC Cycles ai10048 CONTENT CRC E CMD |
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