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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DAC38RF80IAAV bảng dữ liệu(PDF) 84 Page - Texas Instruments |
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DAC38RF80IAAV bảng dữ liệu(HTML) 84 Page - Texas Instruments |
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84 / 160 page  7.5.6 SYSREF Alignment Circuit Alarms Register (address = 0x05) [reset = variable] Figure 7-39. SYSREF Alignment Circuit Alarms Register (ALM_SYSREF_DET) 15 14 13 12 11 10 9 8 0 0 0 0 0 0 0 x W0C W0C W0C W0C W0C W0C W0C W0C 7 6 5 4 3 2 1 0 0 0 0 0 0 1 0 1 W0C W0C W0C W0C W0C W0C W0C W0C LEGEND: R/W = Read/Write; R = Read only; W0C = Write 0 to clear bit; -n = value after reset Table 7-49. ALM_SYSREF_DET Field Descriptions Bit Field Type Reset Description 15:9 Reserved W0C 0000000 Reserved 8 ALM_SYSRPHASE4 W0C 0 If high the sysrefphase4 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync. 7 ALM_SYSRPHASE3 W0C 0 If high the sysrefphase3 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync. 6 ALM_SYSRPHASE2 W0C 0 If high the sysrefphase2 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync. 5 ALM_SYSRPHASE1 W0C 0 If high the sysrefphase1 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync. 4 ALM_ALIGN_TO_R3 W0C 0 If high the align_to_r3 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync. TI Internal use only. 3 ALM_ALIGN_TO_R1 W0C 0 If high the align_to_r1 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync. TI Internal use only. 2 ALM_SD0_PLL W0C 0 Driven high if the PLL in the Serdes 0 block goes out of lock. A false alarm is generated at startup when the PLL is locking. User will have to reset this bit after start to monitor accurately. 1 ALM_SD1_PLL W0C 0 Driven high if the PLL in the Serdes 1 block goes out of lock. A false alarm is generated at startup when the PLL is locking. User will have to reset this bit after start to monitor accurately. 0 PLL_LOCK W0C 0 Asserted when PLL is unlocked. DAC38RF80, DAC38RF83, DAC38RF84 DAC38RF85, DAC38RF90, DAC38RF93 SLASEA3D – DECEMBER 2016 – REVISED DECEMBER 2023 www.ti.com 84 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: DAC38RF80 DAC38RF83 DAC38RF84 DAC38RF85 DAC38RF90 DAC38RF93 |
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