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DAC38RF80IAAV bảng dữ liệu(PDF) 21 Page - Texas Instruments

tên linh kiện DAC38RF80IAAV
Giải thích chi tiết về linh kiện  DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
PDF  160 Pages
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nhà sản xuất  TI2 [Texas Instruments]
Trang chủ  https://www.ti.com
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DAC38RF80IAAV bảng dữ liệu(HTML) 21 Page - Texas Instruments

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6.9 Timing Requirements
MIN
NOM
MAX
UNIT
Digital Input Timing Specifications
Timing: SYSREF+/-
ts(SYSREF)
Setup time, SYSREF+/- valid to rising
edge of DACCLK+/-
SYSREF Capture assist disabled
50
ps
th(SYSREF)
Hold time, SYSREF+/- valid after rising
edge of DACCLK+/-
SYSREF Capture assist disabled
50
ps
Timing: SeriaL Port
ts(/SDEN)
Setup time, SDEN to rising edge of SCLK
20
ns
ts(SDIO)
Setup time, SDIO valid to rising edge of SCLK
10
ns
th(SDIO)
Hold time, SDIO valid after rising edge of SCLK
5
ns
t(SCLK)
Period of SCLK
temperature sensor read
1
µs
All other registers
100
ns
td(Data)
Data output delay after falling edge of SCLK
25
ns
tRESET
Minimum RESET pulse width
25
ns
Analog Output
ts(DAC)
Output settling time to 0.1%
1
ns
tr
Output rise time 10% to 90%
50
ps
tf
Output fall time 90% to 10%
50
ps
Latency
RX SerDes AnalogDelay
250
ps
DAC wake-up time
IOUT current settling to 1% of IOUTFS from
deep sleep
90
µs
DAC sleep time
IOUT current settling to less than 1% of
IOUTFS in deep sleep
90
µs
www.ti.com
DAC38RF80, DAC38RF83, DAC38RF84
DAC38RF85, DAC38RF90, DAC38RF93
SLASEA3D – DECEMBER 2016 – REVISED DECEMBER 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: DAC38RF80 DAC38RF83 DAC38RF84 DAC38RF85 DAC38RF90 DAC38RF93



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