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TPS3435CGLEFDDFR bảng dữ liệu(PDF) 9 Page - Texas Instruments |
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TPS3435CGLEFDDFR bảng dữ liệu(HTML) 9 Page - Texas Instruments |
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9 / 39 page ![]() 6.5 Electrical Characteristics At 1.04V ≤ VDD ≤ 6V, MR = Open, RESET pull-up resistor (Rpull-up) = 100kΩ to VDD, WDO pull-up resistor (Rpull-up) = 100kΩ to VDD, output load (CLOAD) = 10pF and over operating free-air temperature range –40℃ to 125℃, unless otherwise noted. VDD ramp rate ≤ 1V/µs. Typical values are at TA = 25℃ PARAMETER TEST CONDITIONS MIN TYP MAX UNIT COMMON PARAMETERS VDD Input supply voltage Active LOW output 1.04 6 V VIT– Negative-going input threshold accuracy (1) VIT– = 1.05V to 1.95V –1.4 ±0.5 1.4 % VIT– = 2.0V to 5.4V –1.2 ±0.5 1.2 VHYS Hysteresis VIT– pin VIT– = 1.05V to 5.4V 3 5 7 % IDD Supply current into VDD pin (2) VDD = 2V VIT– = 1.05V to 1.9V TA = –40℃ to 85 ℃ 0.25 0.8 µA 0.25 3 VDD = 6V VIT– = 1.05V to 5.4V TA = –40℃ to 85 ℃ 0.25 0.8 0.25 3 VIL Low level input voltage WD–EN, WDI, SETx, MR (2) 0.3VDD V VIH High level input voltage WD–EN, WDI, SETx, MR (2) 0.7VDD V R MR Manual reset internal pull-up resistance 100 kΩ RESET / WDO (Open-drain active-low) VOL Low level output voltage VDD =1.5V, 1.55V ≤ VIT– ≤ 3.35V IOUT(Sink) = 500µA 300 mV VDD = 3.3V, 3.4V ≤ VIT– ≤ 5.4V IOUT(Sink) = 2mA 300 mV Ilkg(OD) Open-Drain output leakage current VDD = VPULLUP = 6V TA = –40℃ to 85℃ 10 30 nA VDD = VPULLUP = 6V 10 120 nA RESET / WDO (Push-pull active-low) VPOR Power on RESET voltage (3) VOL(max) = 300mV IOUT(Sink) = 15µA 900 mV VOL Low level output voltage VDD = 0.9V, 1.05V ≤ VIT– ≤ 1.5V IOUT(Sink) = 15µA 300 mV VDD = 1.5V, 1.55V ≤ VIT– ≤ 3.35V IOUT(Sink) = 500µA 300 VDD = 3.3V, 3.4V ≤ VIT– ≤ 5.4V IOUT(Sink) = 2mA 300 VOH High level output voltage VDD = 1.8V, 1.05V ≤ VIT– ≤ 1.4V IOUT(Source) = 500µA 0.8VDD V VDD = 3.3V, 1.45V ≤ VIT– ≤ 3.0V IOUT(Source) = 500µA 0.8VDD VDD = 6V, 3.05V ≤ VIT– ≤ 5.4V IOUT(Source) = 2mA 0.8VDD (1) VIT– threshold voltage range from 1.05V to 5.4V in 50mV steps. (2) If the logic signal driving MR is less than VDD, then additional current flows into VDD and out of MR. (3) VPOR is the minimum VDD voltage level for a controlled output state www.ti.com TPS35-Q1 SLVSGE8B – NOVEMBER 2022 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TPS35-Q1 |
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