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STW4810CHDRLF bảng dữ liệu(PDF) 15 Page - STMicroelectronics

tên linh kiện STW4810CHDRLF
Giải thích chi tiết về linh kiện  Power management for multimedia processors
PDF  78 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STW4810CHDRLF bảng dữ liệu(HTML) 15 Page - STMicroelectronics

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STw4810
Functional description
15/78
REQUEST_MC ball. STw4810 remains in internal oscillator mode until it receives the
external clock signal on MASTER_CLK ball.
EXT_CLK: When MASTER_CLK is detected, the STw4810 uses this clock as reference and
switches off its internal oscillator to save quiescent. MASTERCLK should remain connected
up to sleep mode.
Sleep: Sleep mode is required by multimedia processor by setting a PWREN at low level.
Then VDDOK is forced to 0, regulators (VCORE, VIO_VMEM) switch to sleep mode and
wait for PWREN at high level (
Figure 4).
Wake-up: From sleep mode, the multimedia processor requests to switch back to Normal
mode. Thus the device restarts its internal oscillator and then switches regulators from sleep
to normal mode and informs multimedia processor with VDDOK at high level (
Figure 4).
Note:
By default VAUX is in stand by mode, pdn_vaux = 0 (Table 18). It can be programmed in
normal mode only by asserted pdn_vaux bit to “1”.



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