68HC05PL4B datasheet(81/98 Pages) FREESCALE

81 / 98 page

April 30, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05PL4

INSTRUCTION SET

REV 2.0

12-13

SUB #

opr

SUB

opr

SUB

opr

SUB

opr,X

SUB

opr,X

SUB ,X

Subtract Memory

Byte from

Accumulator

A ← (A) – (M)

— — ◊◊◊

IMM

DIR

EXT

IX2

IX1

hh ll

ee ff

SWI

Software Interrupt

PC ← (PC) + 1; Push (PCL)

SP ← (SP) – 1; Push (PCH)

SP ← (SP) – 1; Push (X)

SP ← (SP) – 1; Push (A)

SP ← (SP) – 1; Push (CCR)

SP ← (SP) – 1; I ← 1

PCH ← Interrupt Vector High Byte

PCL ← Interrupt Vector Low Byte

— 1 — — —

INH

TAX

Transfer

Accumulator to

Index Register

X ← (A)

—————

INH

TST

opr

TSTA

TSTX

TST

opr,X

TST ,X

Test Memory Byte

for Negative or Zero

(M) – $00

—————

DIR

INH

IX1

TXA

Transfer Index

Accumulator

A ← (X)

—————

INH

WAIT

Stop CPU Clock and

Enable

Interrupts

— ◊ — — —

INH

Accumulator

opr

Operand (one or two bytes)

Carry/borrow flag

Program counter

CCR

Condition code register

PCH

Program counter high byte

Direct address of operand

PCL

Program counter low byte

dd rr

Direct address of operand and relative offset of branch instruction

REL

Relative addressing mode

DIR

Direct addressing mode

rel

Relative program counter offset byte

ee ff

High and low bytes of offset in indexed, 16-bit offset addressing

Relative program counter offset byte

EXT

Extended addressing mode

Stack pointer

Offset byte in indexed, 8-bit offset addressing

Index register

Half-carry flag

Zero flag

hh ll

High and low bytes of operand address in extended addressing

Immediate value

Interrupt mask

∧

Logical AND

Immediate operand byte

∨

Logical OR

IMM

Immediate addressing mode

⊕

Logical EXCLUSIVE OR

INH

Inherent addressing mode

( )

Contents of

Indexed, no offset addressing mode

–( )

Negation (two’s complement)

IX1

Indexed, 8-bit offset addressing mode

←

Loaded with

IX2

Indexed, 16-bit offset addressing mode

Memory location

Concatenated with

Negative flag

Set or cleared

Any bit

—

Not affected

Table 12-6. Instruction Set Summary (Continued)

Source

Form

Operation

Description

Effect on

CCR

H I NZC

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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