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ADUM1253 bảng dữ liệu(PDF) 9 Page - Analog Devices |
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ADUM1253 bảng dữ liệu(HTML) 9 Page - Analog Devices |
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9 / 24 page ![]() ADuM1253 Ultra-Low-Power, I2C Isolator with Unidirectional SCL, Extended VDD, Idle-Bus Hot-Swap, and Low VOL www.analog.com Analog Devices | 9 Timing Diagrams VDD1 0.1µF VDD1 TEST SOURCE S__1 GND1 GND2 VDD2 0.1µF VDD2 S__2 ADuM1253 R1 CL1 CL2 R2 Figure 1. Timing Test Diagram VDD2 S__2 GND2 50% 50% tPLH21 tPHL21 VDD1 S__1 GND1 90% 0.9V tF1 70% VDD1 S__1 GND1 50% 50% tPLH12 tPHL12 VDD2 S__2 GND2 70% 0.4V tF2 90% 10% Figure 2. Timing Parameter Definition Safety Limits Damage to the IC can result in a low-resistance path to ground or to the supply and, without current limiting, the ADuM1253 can dissipate excessive amounts of power. Excessive power dissipation can damage the die and result in damage to the isolation barrier, potentially causing downstream issues. The safety limits for the ADuM1253 are listed in the package specific Isolation Characteristics table. The maximum safety temperature (TS) for the device is the +150°C maximum junction temperature specified in the Absolute Maximum Ratings. See the Thermal Considerations section for details on determining the junction temperature. Figure 3 and Figure 4 show the thermal derating curves for safety limiting the power and the current for the device in the 8-lead Narrow SOIC (21-0041) package when mounted on the JEDEC 2S2P test card. Ensure that the junction temperature does not exceed +150°C. |
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