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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TMP93CS41 bảng dữ liệu(PDF) 245 Page - Toshiba Semiconductor |
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TMP93CS41 bảng dữ liệu(HTML) 245 Page - Toshiba Semiconductor |
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245 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-243 15. Releasing the HALT mode by requesting an interruption Usually, interrupts can release all halts status. However, the interrupts ( NMI , INT0) which can release the HALT mode may not be able to do so if they are input during the period CPU is shifting to the HALT mode (for about 3 clocks of fFPH) with IDLE1 or STOP mode (IDLE2/RUN are not applicable to this case). (In this case, an interrupt request is kept on hold internally.) If another interrupt is generated after it has shifted to HALT mode completely, halt status can be released without difficulty. The priority of this interrupt is compared with that of the interrupt kept on hold internally, and the interrupt with higher priority is handled first followed by the other interrupt. |
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