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TMP93CS41 bảng dữ liệu(PDF) 110 Page - Toshiba Semiconductor

tên linh kiện TMP93CS41
Giải thích chi tiết về linh kiện  CMOS 16-Bit Microcontroller
PDF  248 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP93CS41 bảng dữ liệu(HTML) 110 Page - Toshiba Semiconductor

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TMP93CS40/TMP93CS41
20004-02-10
93CS40-108
The comparator signal is output from timer 0 each time the up counter UC0 matches
TREG0, when the up counter UC0 is not to be cleared.
With the timer 1 comparator, the match detect signal is output at each comparator check
when the up counter UC1 and TREG1 values are found to match. When the match detect
signal is output simultaneously from the comparators of both timer 0 and timer 1, the up
counters UC0 and UC1 are cleared to 0, and the interrupt INTT1 is generated. If inversion
is enabled, the value of the timer flip-flop TFF1 is inverted.
Example: When TREG1
= 04H and TREG0 = 80H
Figure 3.7.9 Timer Output by 16-Bit Timer Mode
(3) 8-bit PPG (Programmable pulse generation) output mode
Square wave pulse can be generated at any frequency and duty by timer 0. The output
pulse may be either low-active or high-active. In this mode, timer 1 cannot be used.
Timer 0 outputs a pulse to the TO1 pin (also used as P71).
Figure 3.7.10 8-Bit PPG Output Waveforms
Value of up counter
(UC1, UC0)
0000H
Timer 0 comparator
match detect signal
Interrupt INTT1
Timer output TO1
0080H
0180H
0280H
0380H
0480H
Inversion
TREG0 and UC0 match
(Interrupt INTT0)
tH
TREG1 and UC0 match
(Interrupt INTT1)
TO1
TREG0
tL
TREG1
t



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