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TMPR4937 bảng dữ liệu(PDF) 290 Page - Toshiba Semiconductor |
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TMPR4937 bảng dữ liệu(HTML) 290 Page - Toshiba Semiconductor |
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290 / 552 page ![]() Chapter 10 PCI Controller 10-32 10.4.5 P2G Memory Space 0 PCI Lower Base Address Register (P2GM0PLBASE) 0xD010 This register corresponds to the Memory Space 0 Lower Base Address Register at offset address 0x10 of the PCI Configuration Space. This register cannot be accessed when the PCI Controller is in the Satellite mode. 31 29 28 16 BA[31:29] Reserved R/W : Type 0x00 : Initial value 15 4 3 2 1 0 Reserved PF TYPE MSI R R R : Type 1 00 0 : Initial value Bit Mnemonic Field Name Description Read/Write 31:29 BA[31:29] Base Address Base Address (Default: 0x00) Sets the lower address of the PCI base address in Target Access Memory Space 0. The size of Memory Space 0 is fixed at 512 MB. R/W 28:4 Reserved ⎯ 3 PF Prefetchable Prefetchable (Fixed Value: 1) 1: Indicates that memory is prefetchable. R 2:1 TYPE Type Type (Default: 00) 00: Indicades that an address is within a 32-bit address region. R 0 MSI Memory Space Memory Space Indicator (Fixed Value: 0) 0: Indicates that this Base Address Register is for use by the PCI Memory Space. R Figure 10.4.5 P2G Memory Space 0 PCI Lower Base Address Register |
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