TMPR4937 datasheet(482/552 Pages) TOSHIBA

482 / 552 page

Chapter 15 Interrupt Controller

15-36

Bit

Mnemonic

Field Name

Explanation

Read/Write

IS9

Interrupt Status 9

IRINTREQ [9] status

This bit indicates the status of SIO [1] interrupts.

1: Interrupt requests

0: No interrupt requests

IS8

Interrupt Status 8

IRINTREQ [8] status

This bit indicates the status of SIO [0] interrupts.

1: Interrupt requests

0: No interrupt requests

IS7

Interrupt Status 7

IRINTREQ [7] status

This bit indicates the status of external INT [5] interrupts.

1: Interrupt requests

0: No interrupt requests

IS6

Interrupt Status 6

IRINTREQ [6] status

This bit indicates the status of external INT [4] interrupts.

1: Interrupt requests

0: No interrupt requests

IS5

Interrupt Status 5

IRINTREQ [5] status

This bit indicates the status of external INT [3] interrupts.

1: Interrupt requests

0: No interrupt requests

IS4

Interrupt Status 4

IRINTREQ [4] status

This bit indicates the status of external INT [2] interrupts.

1: Interrupt requests

0: No interrupt requests

IS3

Interrupt Status 3

IRINTREQ [3] status

This bit indicates the status of external INT [1] interrupts.

1: Interrupt requests

0: No interrupt requests

IS2

Interrupt Status 2

IRINTREQ [2] status

This bit indicates the status of external INT [0] interrupts.

1: Interrupt requests

0: No interrupt requests

IS1

Interrupt Status 1

IRINTREQ [1] status

This bit indicates the status of TX49 Write Timeout Error interrupts.

1: Interrupt requests

0: No interrupt requests

IS0

Interrupt Status 0

IRINTREQ [0] status

This bit indicates the status of ECC Error interrupts.

1: Interrupt requests

0: No interrupt requests

Figure 15.4.14 Interrupt Source Status Register (3/3)

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