công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

TUSB8020BPHPR bảng dữ liệu(PDF) 24 Page - Texas Instruments

Click here to check the latest version.
tên linh kiện TUSB8020BPHPR
Giải thích chi tiết về linh kiện  TUSB8020B Two-Port USB 3.0 Hub
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI - Texas Instruments

TUSB8020BPHPR bảng dữ liệu(HTML) 24 Page - Texas Instruments

Back Button TUSB8020BPHPR Datasheet HTML 20Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 21Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 22Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 23Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 24Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 25Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 26Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 27Page - Texas Instruments TUSB8020BPHPR Datasheet HTML 28Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 24 / 44 page
background image
24
TUSB8020B
SLLSEF6C – JULY 2014 – REVISED JUNE 2017
www.ti.com
Product Folder Links: TUSB8020B
Submit Documentation Feedback
Copyright © 2014–2017, Texas Instruments Incorporated
8.5.1.23 Device Status and Command Register (offset = F8h)
Figure 25. Register Offset F8h
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
RSU
RCU
LEGEND: R/W = Read/Write; R = Read only; –n = value after reset
Table 26. Bit Descriptions – Device Status and Command Register
Bit
Field Name
Access
Reset
Description
7:2
RSVD
R
Reserved. Read only, returns 0 when read.
1
smbusRst
RSU
SMBus interface reset. This bit loads the registers back to their GRSTz values.
This bit is set by writing a 1 and is cleared by hardware on completion of the reset. A
write of 0 has no effect.
0
cfgActive
RCU
Configuration active. This bit indicates that configuration of the TUSB8020B is currently
active. The bit is set by hardware when the device enters the I2C or SMBus mode. The
TUSB8020B will not connect on the upstream port while this bit is 1.
When in the SMBus mode, this bit must be cleared by the SMBus host to exit the
configuration mode and allow the upstream port to connect.
The bit is cleared by a writing 1. A write of 0 has no effect.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com