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TUSB8020BPHPR bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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TUSB8020BPHPR bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 44 page ![]() 4 TUSB8020B SLLSEF6C – JULY 2014 – REVISED JUNE 2017 www.ti.com Product Folder Links: TUSB8020B Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Pin Functions PIN TYPE DESCRIPTION NAME NO. CLOCK AND RESET SIGNALS GRSTz 11 I PU Global power reset. This reset brings all of the TUSB8020B internal registers to their default states. When GRSTz is asserted, the device is completely nonfunctional. XI 38 I Crystal input. This terminal is the crystal input for the internal oscillator. The input may alternately be driven by the output of an external oscillator. When using a crystal a 1-M Ω feedback resistor is required between XI and XO. XO 39 O Crystal output. This terminal is the crystal output for the internal oscillator. If XI is driven by an external oscillator this pin may be left unconnected. When using a crystal a 1-M Ω feedback resistor is required between XI and XO. USB UPSTREAM SIGNALS USB_SSTXP_UP 29 O USB SuperSpeed transmitter differential pair (positive) USB_SSTXM_UP 28 O USB SuperSpeed transmitter differential pair (negative) USB_SSRXP_UP 32 I USB SuperSpeed receiver differential pair (positive) USB_SSRXM_UP 31 I USB SuperSpeed receiver differential pair (negative) USB_DP_UP 26 I/O USB high-speed differential transceiver (positive) USB_DM_UP 27 I/O USB high-speed differential transceiver (negative) USB_R1 24 I Precision resistor reference. A 9.53-k Ω ±1% resistor should be connected between USB_R1 and GND. USB_VBUS 9 I USB upstream port power monitor. The VBUS detection requires a voltage divider. The signal USB_VBUS must be connected to VBUS through a 90.9-k Ω ±1% resistor, and to ground through a 10-k Ω ±1% resistor from the signal to ground. USB DOWNSTREAM SIGNALS USB_SSTXP_DN1 43 O USB SuperSpeed transmitter differential pair (positive) downstream port 1. USB_SSTXM_DN1 44 O USB SuperSpeed transmitter differential pair (negative) downstream port 1. USB_SSRXP_DN1 46 I USB SuperSpeed receiver differential pair (positive) downstream port 1. USB_SSRXM_DN1 47 I USB SuperSpeed receiver differential pair (negative) downstream port 1. USB_DP_DN1 41 I/O USB high-speed differential transceiver (positive) downstream port 1. USB_DM_DN1 42 I/O USB high-speed differential transceiver (negative) downstream port 1. PWRCTL1/BATEN1 4 I/O PD USB port 1 power-on control for downstream power or battery charging enable. The terminal is used for control of the downstream power switch for Port 1. In addition, the value of the terminal is sampled at the deassertion of reset to determine the value of the battery charging support for Port 1 as indicated in the Battery Charging Support register. 0 = Battery charging not supported 1 = Battery charging supported OVERCUR1z 5 I PU USB DS port 1 overcurrent detection input. This terminal is used to connect the over current output of the downstream port power switch for port 1. 0 = An overcurrent event has occurred 1 = An overcurrent event has not occurred If power management is enabled, the external circuitry needed should be determined by the power switch. In ganged mode, either OVERCUR1z or OVERCUR2z can be used. In ganged mode, the overcurrent will be reported as a hub event instead of a port event. USB_SSTXP_DN2 16 O USB SuperSpeed transmitter differential pair (positive) downstream port 2. USB_SSTXM_DN2 17 O USB SuperSpeed transmitter differential pair (negative) downstream port 2. USB_SSRXP_DN2 19 I USB SuperSpeed receiver differential pair (positive) downstream port 2. USB_SSRXM_DN2 20 I USB SuperSpeed receiver differential pair (negative) downstream port 2. USB_DP_DN2 14 I/O USB high-speed differential transceiver (positive) downstream port 2. USB_DM_DN2 15 I/O USB high-speed differential transceiver (negative) downstream port 2. PWRCTL2/BATEN2 6 I/O PD Power-on control /battery charging enable for downstream port 2. This terminal is used for control of the downstream power switch for port 2. The value of the terminal is sampled at the deassertion of reset to determine the value of the battery charging support for port 2 as indicated in the Battery Charging Support register. 0 = Battery charging not supported 1 = Battery charging supported OVERCUR2z 8 I PU Overcurrent detection for downstream port 2. This terminal is used to connect the over current output of the downstream port power switch for port 2. 0 = An overcurrent event has occurred 1 = An overcurrent event has not occurred If power management is enabled, the external circuitry needed should be determined by the power switch. In ganged mode either OVERCUR1z or OVERCUR2z can be used. In ganged mode the overcurrent will be reported as a hub event instead of a port event. |
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