TMS320DM355 datasheet(25/153 Pages) TI

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TMS320DM355

Digital Media System-on-Chip (DMSoC)

SPRS463 – SEPTEMBER 2007

Table 2-11. GPIO Terminal Functions (continued)

TERMINAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

NAME

NO.

Async EMIF: Address Bus bit[09]

EM_A09 /

GIO: GIO[063] System: AECFG[3:0] sampled at Power-on-Reset to set AEMIF

GIO063 /

P17

I/O/Z

VDD

Configuration AECFG[2:1] sets default for PinMux2.EM_BA0: AEMIF EM_BA0

AECFG[1]

Definition (EM_BA0, EM_A14, GIO[054], rsvd)

Async EMIF: Address Bus bit[10]

EM_A10 /

GIO: GIO[064] System: AECFG[3:0] sampled at Power-on-Reset to set AEMIF

GIO064 /

R18

I/O/Z

VDD

Configuration AECFG[2:1] sets default for PinMux2.EM_BA0: AEMIF EM_BA0

AECFG[2]

Definition (EM_BA0, EM_A14, GIO[054], rsvd)

EM_A03 /

Async EMIF: Address Bus bit[03]

N18

I/O/Z

VDD

GIO057

GIO: GIO[057]

EM_A04 /

Async EMIF: Address Bus bit[04]

P15

I/O/Z

VDD

GIO058

GIO: GIO[058]

EM_A05 /

Async EMIF: Address Bus bit[05]

R19

I/O/Z

VDD

GIO059

GIO: GIO[059]

EM_A06 /

Async EMIF: Address Bus bit[06]

P18

I/O/Z

VDD

GIO060

GIO: GIO[060]

EM_A07 /

Async EMIF: Address Bus bit[07]

P16

I/O/Z

VDD

GIO061

GIO: GIO[061] - Used by ROM Bootloader to provide progress status via LED

Async EMIF: Address Bus bit[08]

EM_A08 /

GIO: GIO[062] AECFG[0] sets default for - PinMux2.EM_A0_BA1: AEMIF

GIO062 /

T19

I/O/Z

VDD

Address Width (OneNAND or NAND) - PinMux2.EM_A13_3: AEMIF Address

AECFG[0]

Width (OneNAND or NAND)

Async EMIF: Address Bus bit[09]

EM_A09 /

GIO: GIO[063] System: AECFG[3:0] sampled at Power-on-Reset to set AEMIF

GIO063 /

P17

I/O/Z

VDD

Configuration AECFG[2:1] sets default for PinMux2.EM_BA0: AEMIF EM_BA0

AECFG[1]

Definition (EM_BA0, EM_A14, GIO[054], rsvd)

Async EMIF: Address Bus bit[10]

EM_A10 /

GIO: GIO[064] System: AECFG[3:0] sampled at Power-on-Reset to set AEMIF

GIO064 /

R18

I/O/Z

VDD

Configuration AECFG[2:1] sets default for PinMux2.EM_BA0: AEMIF EM_BA0

AECFG[2]

Definition (EM_BA0, EM_A14, GIO[054], rsvd)

Async EMIF: Address Bus bit[11]

EM_A11 /

GIO: GIO[065] System: AECFG[3:0] sampled at Power-on-Reset to set AEMIF

GIO065 /

R16

I/O/Z

VDD

Configuration AECFG[3] sets default for PinMux2.EM_D15_8: AEMIF Default

AECFG[3]

Bus Width (16 or 8 bits)

EM_A12 /

Async EMIF: Address Bus bit[12]

GIO066 /

U19

I/O/Z

GIO: GIO[066] System: BTSEL[1:0] sampled at Power-on-Reset to determine

VDD

BTSEL[0]

Boot method

Async EMIF: Address Bus bit[13]

EM_A13 /

GIO: GIO[067] System: BTSEL[1:0] sampled at Power-on-Reset to determine

GIO067 /

V19

I/O/Z

VDD

Boot method Used to drive Boot Status LED signal (active low) in ROM boot

BTSEL[1]

modes

VCLK /

Video Encoder: Video Output Clock

I/O/Z

VDD_VOUT

GIO068

GIO: GIO[068]

EXTCLK /

Video Encoder: External clock input, used if clock rates > 27 MHz are needed,

GIO069 /

I/O/Z

e.g. 74.25 MHz for HDTV digital output

B2 /

VDD_VOUT

GIO: GIO[069] Digital Video Out: B2 PWM3D

PWM3D

FIELD /

GIO070 /

Video Encoder: Field identifier for interlaced display formats

I/O/Z

VDD_VOUT

R2 /

GIO: GIO[070] Digital Video Out: R2 PWM3C

PWM3C

VSYNC /

Video Encoder: Vertical Sync

I/O/Z

GIO072

VDD_VOUT

GIO: GIO[072]

HSYNC /

Video Encoder: Horizontal Sync

I/O/Z

GIO073

VDD_VOUT

GIO: GIO[073]

COUT0-

B3 /

Digital Video Out: VENC settings determine function GIO: GIO[074]

I/O/Z

VDD_VOUT

GIO074 /

PWM3B

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