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TMS320DM355 bảng dữ liệu(PDF) 92 Page - Texas Instruments |
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TMS320DM355 bảng dữ liệu(HTML) 92 Page - Texas Instruments |
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92 / 153 page ![]() www.ti.com 4.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRS463 – SEPTEMBER 2007 Case Temperature (Unless Otherwise Noted) PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT VOH High-level output voltage(2) VDD=MIN, IOH=MAX 2.4 Voltage V Output VOL Low-level output voltage(2) VDD=MIN, IOL=MAX 0.6 Input current for I/O without II VI = VSS to VDD -1 1 internal pull-up/pull-down Input current for I/O with internal II(pullup) VI = VSS to VDD 40 190 pull-up(3)(4) Current Input current for I/O with internal II(pulldown) VI = VSS to VDD -190 -40 Input/Outp μA pull-down(3)(4) ut IOH High-level output current -100 IOL Low-level output current 4000 VO = VDD or VSS; internal pull IOZ I/O off-state output current ±10 disabled CI Input capacitance 4 Capacitan pF ce CO Output capacitance 4 Resolution Resolution 10 Bits RLOAD = 499 Ω, Video buffer INL Integral non-linearity, best fit 1 LSB disabled DAC RLOAD = 499 Ω, Video buffer DNL Differential non-linearity 0.5 LSB disabled Compliance Output compliance range IFS = 1.4 mA, RLOAD = 499 Ω 0 0.700 V Output high voltage (top of 75% VOH(VIDBUF) 1.55 NTSC or PAL colorbar)(5) Video V Buffer Outpupt low voltage (bottom of VOL(VIDBUF) 0.470 sync tip) (1) For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table. (2) These I/O specifications apply to regular 3.3 V I/Os and do not apply to DDR2/mDDR, USB I/Os. DDR2/mDDR I/Os are 1.8 V I/Os and adhere to JESD79-2A standard, USB I/Os adhere to USB2.0 spec. (3) This specification applies only to pins with an internal pullup (PU) or pulldown (PD). See Section 2.4 or Section 2.5 for pin descriptions. (4) To pull up a signal to the opposite supply rail, a 1 k Ω resistor is recommended. (5) 100% color bars are not supported. 100% color bars require 1.2 V peak-to-peak. The video buffer only provides 1.0 V peak-to-peak. Device Operating Conditions 92 Submit Documentation Feedback |
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