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ST7LITE49M bảng dữ liệu(PDF) 60 Page - STMicroelectronics |
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ST7LITE49M bảng dữ liệu(HTML) 60 Page - STMicroelectronics |
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60 / 188 page  Power saving modes ST7LITE49M 60/188 9.2 Slow mode This mode has two targets: ● To reduce power consumption by decreasing the internal clock in the device, ● To adapt the internal clock frequency (fCPU) to the available supply voltage. Slow mode is controlled by the SMS bit in the MCCSR register which enables or disables Slow mode. In this mode, the oscillator frequency is divided by 32. The CPU and peripherals are clocked at this lower frequency. Note: Slow-Wait mode is activated when entering Wait mode while the device is already in Slow mode. Figure 25. Slow mode clock transition 9.3 Wait mode Wait mode places the MCU in a low power consumption mode by stopping the CPU. This power saving mode is selected by calling the ‘WFI’ instruction. All peripherals remain active. During Wait mode, the I bit of the CC register is cleared, to enable all interrupts. All other registers and memory remain unchanged. The MCU remains in Wait mode until an interrupt or Reset occurs, whereupon the Program Counter branches to the starting address of the interrupt or Reset service routine. The MCU will remain in Wait mode until a Reset or an Interrupt occurs, causing it to wake up. Refer to Figure 26 for a desription of the Wait mode flowchart.. SMS fCPU NORMAL RUN MODE REQUEST fOSC fOSC/32 fOSC |
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