CLRC663 datasheet(93/177 Pages) NXP

93 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

Bit

Symbol

VMid_r_sel

RFU

rcv_hpcf

rcv_gain

Access

rights

r/w

Table 167. RxAna register (address 39h)

Bit

Symbol

Description

7, 6

VMid_r_sel

Factory trim value, needs to be 0.

5, 4

RFU

3, 2

rcv_hpcf

The rcv_hpcf [1:0] signals allow 4 different settings of the base band amplifier high pass

cut-off frequency from ~40 kHz to ~300 kHz.

1 to 0

rcv_gain

With rcv_gain[1:0] four different gain settings from 30 dB and 60 dB can be configured

(differential output voltage/differential input voltage).

Table 168. RxAna bits

rcv_gain (Hex.)

rcv_hpcf (Hex.)

fl (kHz)

fU (MHz)

gain (dB20)

bandwidth (MHz)

2.3

2.4

2.3

150

2.6

2.5

264

2.9

2.6

2.3

2.4

2.3

157

2.6

2.4

272

3.0

2.7

2.6

2.7

2.6

157

2.9

2.7

273

3.3

3.0

2.6

2.7

2.6

159

2.9

2.7

276

3.4

3.1

Table 169. Effect of gain and high-pass corner register settings

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

93 / 177

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