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ADC3908CSSS bảng dữ liệu(PDF) 100 Page - Texas Instruments

tên linh kiện ADC3908CSSS
Giải thích chi tiết về linh kiện  ADC3910Dx and ADC3910Sx 10-bit, 25 to 125-MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers
PDF  131 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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ADC3908CSSS bảng dữ liệu(HTML) 100 Page - Texas Instruments

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6.6.2.103 0x163 Register (Address = 163h) [Reset = 0h]
Return to the Summary Table.
Table 6-194. 0x163 Register Field Descriptions
Bit
Field
Type
Reset
Description
3:0
STATS_MAX_N2_CHA__
11:8
R
0h
Maximum value on channel A in window N-2
6.6.2.104 0x164 Register (Address = 164h) [Reset = 00h]
Return to the Summary Table.
Table 6-195. 0x164 Register Field Descriptions
Bit
Field
Type
Reset
Description
7:0
STATS_MAX_N2_CHB__
7:0
R
0h
Maximum value on channel B in window N-2
6.6.2.105 0x165 Register (Address = 165h) [Reset = 0h]
Return to the Summary Table.
Table 6-196. 0x165 Register Field Descriptions
Bit
Field
Type
Reset
Description
3:0
STATS_MAX_N2_CHB__
11:8
R
0h
Maximum value on channel B in window N-2
6.6.2.106 0x166 Register (Address = 166h) [Reset = 00h]
Return to the Summary Table.
Table 6-197. 0x166 Register Field Descriptions
Bit
Field
Type
Reset
Description
7:0
STATS_MIN_N2_CHA__7:
0
R
0h
Minimum value on channel A in window N-2
6.6.2.107 0x167 Register (Address = 167h) [Reset = 0h]
Return to the Summary Table.
Table 6-198. 0x167 Register Field Descriptions
Bit
Field
Type
Reset
Description
3:0
STATS_MIN_N2_CHA__1
1:8
R
0h
Minimum value on channel A in window N-2
6.6.2.108 0x168 Register (Address = 168h) [Reset = 00h]
Return to the Summary Table.
Table 6-199. 0x168 Register Field Descriptions
Bit
Field
Type
Reset
Description
7:0
STATS_MIN_N2_CHB__7:
0
R
0h
Minimum value on channel B in window N-2
ADC3910D125
SBASAD1 – DECEMBER 2023
www.ti.com
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Product Folder Links: ADC3910D125



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