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USB97C100QFP bảng dữ liệu(PDF) 7 Page - SMSC Corporation |
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USB97C100QFP bảng dữ liệu(HTML) 7 Page - SMSC Corporation |
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7 / 64 page ![]() SMSC DS – USB97C100 Page 7 Rev. 01/03/2001 QFP PIN NUMBER SYMBOL PIN DESCRIPTION BUFFER TYPE 27 PWRGD Active high input. This signal is used to indicate to that chip that a good power level has been reached. When inactive/low, all pins are Tri- stated except TST_OUT and a POR is generated. I 28 RESET_IN Power on reset; active high This signal is used by the system to reset the chip. It also generates an internal POR. I 29 TST_OUT AND tree output This signal is used for testing the chip via an internal AND tree. O8 26 nTEST Test input This signal is a manufacturing test pin. User can pull it high or leave it unconnected. IP [96:81] NC No connect BUFFER TYPE DESCRIPTIONS Table 2 - USB97C100 Buffer Type Description BUFFER DESCRIPTION I Input (no pull-up) IP Input 90µA with internal pull-up O8 Output with 8mA drive I/O8 Input/output with 8mA drive I/O16 Input/output with 16mA drive O24 Output, 24mA sink, 12mA source. I/ODP24 Input/Output drain , 24mA sink, 12mA source with 90µA pull-up ICLKx XTAL clock input OCLKx XTAL clock output ICLK Clock input (TTL levels) I/O-U Defined in USB specification; uses VCC3.3 Note: These DC Characteristics/drive strengths apply to 5V operation only. See the DC Characteristics section for additional details. |
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