USB97C100QFP datasheet(33/64 Pages) SMSC

33 / 64 page

SMSC DS – USB97C100

Page 33

Rev. 01/03/2001

Table 44 - Channel 1 Byte Count Register

CH1_CNT

(ISA 0x0003)

CHANNEL 1 BYTE COUNT

BIT

NAME

R/W

DESCRIPTION

[7:0]

CH1_CNTL

R/W

Lower 8 bits of Byte Count when Byte F/F = 0

[7:0]

CH1_CNTH

R/W

Upper 8 bits of Byte Count when Byte F/F = 1

Note:

The CLEAR_FF register should be written to before writing this register to guarantee which byte (high or

low) is being written. See Address Programming Table for 16 bit Address definitions.

Table 45 - Channel 2 Current Address Register

CH2_ADDR

(ISA 0x0004)

CHANNEL 2 CURRENT ADDRESS

BIT

NAME

R/W

DESCRIPTION

[7:0]

CH2_ADDRL

R/W

Lower 8 bits of Base and Current Address when Byte F/F = 0

[7:0]

CH2_ADDRH

R/W

Upper 8 bits of Base and Current Address when Byte F/F = 1

Note:

The CLEAR_FF register should be written to before writing this register to guarantee which byte (high or

low) is being written. See the Address Programming Table for 16 bit Address definitions.

Table 46 - Channel 2 Byte Count Register

CH2_CNT

(ISA 0x0005)

CHANNEL 2 BYTE COUNT

BIT

NAME

R/W

DESCRIPTION

[7:0]

CH2_CNTL

R/W

Lower 8 bits of Byte Count when Byte F/F = 0

[7:0]

CH2_CNTH

R/W

Upper 8 bits of Byte Count when Byte F/F = 1

Note:

The CLEAR_FF register should be written to before writing this register to guarantee which byte (high or

low) is being written. See Address Programming Table for 16 bit Address definitions.

Table 47 - Channel 3 Current Address Register

CH3_ADDR

(ISA 0x0006)

CHANNEL 3 CURRENT ADDRESS

BIT

NAME

R/W

DESCRIPTION

[7:0]

CH3_ADDRL

R/W

Lower 8 bits of Base and Current Address when Byte F/F = 0

[7:0]

CH3_ADDRH

R/W

Upper 8 bits of Base and Current Address when Byte F/F = 1

Note:

The CLEAR_FF register should be written to before writing this register to guarantee which byte (high or

low) is being written. See the Address Programming Table for 16 bit Address definitions.

Table 48 - Channel 3 Byte Count Register

CH3_CNT

(ISA 0x0007)

CHANNEL 3 BYTE COUNT

BIT

NAME

R/W

DESCRIPTION

[7:0]

CH3_CNTL

R/W

Lower 8 bits of Byte Count when Byte F/F = 0

[7:0]

CH3_CNTH

R/W

Upper 8 bits of Byte Count when Byte F/F = 1

Note:

The CLEAR_FF register should be written to before writing this register to guarantee which byte (high or

low) is being written. See Address Programming Table for 16 bit Address definitions.

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