AT80C51RB2-3CSIM datasheet(59/83 Pages) ATMEL

tên linh kiện	AT80C51RB2-3CSIM

Giải thích chi tiết về linh kiện	80C51 High Performance ROM 8-bit Microcontroller

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AT80C51RD2/AT83C51Rx2

4113B–8051–03/05

Figure 22. Power-down Exit Waveform

Exit from power-down by reset redefines all the SFRs, exit from power-down by external

interrupt does no affect the SFRs.

Exit from power-down by either reset or external interrupt does not affect the internal

RAM content.

Note:

If idle mode is activated with power-down mode (IDL and PD bits set), the exit sequence

is unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and

idle mode is not entered.

Table 43 shows the state of ports during idle and power-down modes.

Note:

1. Port 0 can force a 0 level. A "one" will leave port floating.

INT1

INT0

XTAL

Power-down Phase

OscillatoR Restart Phase

Active Phase

Table 43. State of Ports

Mode

Program Memory

ALE

PSEN

PORT0

PORT1

PORT2

PORT3

Idle

Internal

Port Data

(1)

Port Data

Idle

External

Floating

Port Data

Address

Port Data

Power-down

Internal

Port Dat

(1)

Port Data

Power-down

External

Floating

Port Data

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