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AT80C51RB2-3CSIM bảng dữ liệu(PDF) 56 Page - ATMEL Corporation |
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AT80C51RB2-3CSIM bảng dữ liệu(HTML) 56 Page - ATMEL Corporation |
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56 / 83 page ![]() 57 AT80C51RD2/AT83C51Rx2 4113B–8051–03/05 Table 41. KBE Register KBE - Keyboard Input Enable Register (9Dh) Reset Value = 0000 0000b 7654 3210 KBE7 KBE6 KBE5 KBE4 KBE3 KBE2 KBE1 KBE0 Bit Number Bit Mnemonic Description 7KBE7 Keyboard line 7 enable bit Cleared to enable standard I/O pin. Set to enable KBF.7 bit in KBF register to generate an interrupt request. 6KBE6 Keyboard line 6 enable bit Cleared to enable standard I/O pin. Set to enable KBF.6 bit in KBF register to generate an interrupt request. 5KBE5 Keyboard line 5 enable bit Cleared to enable standard I/O pin. Set to enable KBF.5 bit in KBF register to generate an interrupt request. 4KBE4 Keyboard line 4 enable bit Cleared to enable standard I/O pin. Set to enable KBF.4 bit in KBF register to generate an interrupt request. 3KBE3 Keyboard line 3 enable bit Cleared to enable standard I/O pin. Set to enable KBF.3 bit in KBF register to generate an interrupt request. 2KBE2 Keyboard line 2 enable bit Cleared to enable standard I/O pin. Set to enable KBF.2 bit in KBF register to generate an interrupt request. 1KBE1 Keyboard line 1 enable bit Cleared to enable standard I/O pin. Set to enable KBF.1 bit in KBF register to generate an interrupt request. 0KBE0 Keyboard line 0 enable bit Cleared to enable standard I/O pin. Set to enable KBF.0 bit in KBF register to generate an interrupt request. |
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