WM9707

Production Data

w

PD Rev 4.1 June 2006

28

The part will remain in sleep mode with all its registers holding their static values. To wake up the

WM9707, the AC’97 controller will send a pulse on the sync line issuing a warm reset. This will

restart the WM9707’s digital interface (resetting PR4 to 0). The WM9707 can also be woken up with

a cold reset. A cold reset will cause a loss of values of the registers, as a cold reset will set them to

their default states. When a section is powered back on, the Powerdown Control/Status Register

(index 26h) should be read to verify that the section is ready (i.e. stable) before attempting any

operation that requires it.

PR1 = 1

PR2 = 1

PR4 = 1

ADCs OFF

PR0

DACs OFF

PR1

ANALOGUE

OFF PR2

OR PR3

DIGITAL I/F

OFF PR4

WARM RESET

PR1 = 0 AND

DAC = 1

PR2 = 0 AND

ANL = 1

SHUT OFF

CODA LINK

Figure 17 The WM9707 Powerdown/Flow with Analogue Still Alive

Figure 17 illustrates a state when all the mixers should work with the static volume settings that are

contained in their associated registers. This is used when the user could be playing a CD (or external

LINE_IN source) through WM9707 to the speakers but have most of the system in low power mode.

The procedure for this follows the previous except that the analogue mixer is never shut down.

POWERDOWN CONTROL/STATUS REGISTER (INDEX 26h)

Note that in order to go into ultimate low power mode, PR4 and PR5 are required to be set which

turns off the oscillator circuit. Asserting SYNC resets the PR4 and PR5 bit and re-starts the oscillator

in the same was as the AC link is restarted. Note that PR4 is redundant in slave mode.

REVISION 2.1 REGISTERS (INDEX 28h T0 58h)

These registers are specified as to use in Revision 2.1 of the AC’97 specification and have the

following functions on the WM9707:

REGISTER 28h – EXTENDED AUDIO ID

The Extended Audio ID register is a read only register that identifies which extended audio features

are supported (in addition to the original AC’97 features identified by reading the reset register at

index 00h). A non zero value indicates the feature is supported.

DATA BIT

FUNCTION

ANY MODE

VRA

Variable rate audio support

1

DRA

Double rate audio support

0

VRM

Variable rate Mic ADC support

0

CDAC

Centre DAC support

0

SDAC

Surround DAC support

0

LDAC

LFE DAC support

0

AMAP

Slot to front DAC mapping support

0

ID1

CODEC configuration – fixed in 9707

0

ID0

CODEC configuration – pin 45 value

1 (Inverse of level at pin 45)

Table 13 Extended Audio ID Register