VSC8541XMV-05 datasheet(71/101 Pages) MICROCHIP

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Registers

VMDS-10513 VSC8541-02 Datasheet Revision 4.1

4.6.5

EEE Advertisement

This register defines the EEE advertisement that is sent in the unformatted next page following a EEE

technology message code. The following table shows the bit assignments for the EEE advertisement

4.6.6

EEE Link Partner Advertisement

All the bits in the EEE LP advertisement register are read only. A write to the EEE LP advertisement

the link partner's EEE advertisement register. The following table shows the bit assignments for the EEE

advertisement register.

4.6.7

802.3bf Registers

The following table shows the bit assignments for the 802.3bf registers. When the link is down, 0 is the

value returned. 1.1801 would be device address of 1 and register address of 1801.

Table 82 •

EEE Advertisement, Address 7.60

Bit

Name

Access Description

Default

15:3 Reserved

Reserved.

1000BASE-T EEE

R/W

1: Advertise that the 1000BASE-T has EEE capability.

0: Do not advertise that the 1000BASE-T has EEE capability.

100BASE-TX EEE

R/W

1: Advertise that the 100BASE-TX has EEE capability.

0: Do not advertise that the 100BASE-TX has EEE

capability.

Reserved

Reserved.

Table 83 •

EEE Advertisement, Address 7.61

Bit

Name

Access Description

15:3 Reserved

Reserved.

1000BASE-T EEE

1: Link partner is advertising EEE capability for 1000BASE-T.

0: Link partner is not advertising EEE capability for 1000BASE-T.

100BASE-TX EEE

1: Link partner is advertising EEE capability for 100BASE-TX.

0: Link partner is not advertising EEE capability for 100BASE-TX.

Reserved

Reserved.

Table 84 •

802.3bf Registers

Name

Function

1.1800

PMA/PMD Time Sync capable

1: PMA/PMD Time Sync Tx capable.

0: PMA/PMD Time Sync Rx capable.

1.1801

PMA/PMD delay Tx max

Tx maximum delay through PHY (PMA/PMD/PCS).

1.1803

PMA/PMD delay Tx min

Tx minimum delay through PHY (PMA/PMD/PCS).

1.1805

PMA/PMD delay Rx max

Rx maximum delay through PHY (PMA/PMD/PCS).

1.1807

PMA/PMD delay Rx min

Rx minimum delay through PHY (PMA/PMD/PCS).

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