IMX8ULPIEC datasheet(13/100 Pages) NXP

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Module

Domain

Description

Memories and memory controllers

LPIT0-1

APD, RTD

Low Power Periodic Interrupt Timer (LPIT) is a multi- channel timer

module that can generate independent pre- trigger and trigger outputs.

These timer channels can operate individually or can be chained

together. The pre- trigger and trigger outputscan be used to trigger

other modules on the device. The LPIT can also operate in low power

modes.

MRT

RTD

The Multi-Rate Timer (MRT) provides a repetitive interrupt timer with

four channels. Each channel can be programmed with an independent

time interval.

TSTMR0-1

APD, RTD

The TSTMR module is a free running incrementing counter that starts

running after system reset de-assertion and can be read at any time by

the software for determining the software ticks. The TSTMR is a 64-bit

clock cycle counter. It runs off the 1 MHz clock and resets on every

system reset. The counter only stops when the clock to the TSTMR is

disabled.

WDOG0-8

APD, DSPD, RTD

and LPAVD

The Watchdog Timer (WDOG) module keeps a watch on the system

functioning and resets it in case of its failure. Reasons for failure

include run-away software code and the stoppage of the system clock

that in a safety critical system can lead to serious consequences.

In such cases, the WDOG brings the system into a safe state

of operation.The WDOG monitors the operation of the system by

expecting periodic communication from the software, generally known

as servicing orrefreshing the WDOG. If this periodic refreshing does

not occur, the WDOG resets the system. There are two instances

of WDOG in the uPower subsystem and two instances within the

EdgeLock secure enclave subsystem.

EWM

RTD

The External Watchdog Monitor (EWM) module is designed to monitor

external circuits, as well as the software flow. This provides a back-up

mechanism to the internal WDOG that can reset the system. The EWM

differs from the internal WDOG in that it does not reset the system. The

EWM, if allowed to time-out, provides an independent trigger pin that

when asserted resets or places an external circuit into a safe mode.

Graphic Processor Human Machine Interfaces

GPU-3D

LPAVD

Verisilicon GCNanoUltra3.1 supports Open GL ES 3.1, Vulkan 1.3,

Open CL 3.0 and Open VG1.1

GPU-2D

LPAVD

GPU-2D supports user interface rendering and performs functions like

blending, filtering, rotation, overlay, resizing, transparency, and other

dynamic effects.

MIPI DSI Controller

LPAVD

The MIPI Display Serial Interface Controller (DSI Controller) is

responsible for serializing display data from the GPU. Data can come

from either the GPU or the processor/DMA controller.

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NXP Semiconductors

i.MX 8ULP modules list

i.MX 8ULP Applications Processor—Industrial Products, Rev. 1, 09/2023

Data Sheet: Technical Data

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