IMX8ULPIEC datasheet(21/100 Pages) NXP

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• Flexible Input/Output (FlexIO)

See the i.MX 8ULP modules list for more details.

2.2 Peripherals—low power audio video (LPAV) domain

2.2.1 Graphics processor and human machine interfaces

The i.MX 8ULP Application Domain implements the following graphics processor human machine interfaces:

• 3D graphics processing unit (GPU-3D)

• 2D graphics processing unit (GPU-2D)

• MIPI Display Serial Interface Controller (MIPI DSI)

• DCNano Display Controller

• Pixel Pipeline interface (PXP)

• MIPI Camera Serial Interface (MIPI-CSI)

• The Electrophoretic Display Controller (EPDC)

• HiFi4 DSP

See the i.MX 8ULP modules list for more details.

2.3 Real-time domain (implementing Arm Cortex-M33)

The real-time domain is built around an Arm Cortex-M33 processor that contains a floating-point unit and is optimized for lowest

possible leakage.

2.3.1 Fusion DSP domain

Fusion DSP is part of real-time domain (RTD) and runs at the same core voltage as CM33. Similar to LPAV domain, this is also

considered a slave domain and does not have its own power modes but follows M33. This domain comes up as "disabled" until

it is explicitly enabled by M33 during boot.

2.3.2 Memory system—real-time domain

2.3.2.1 Internal memory—real-time domain

The real-time domain contains 768 KB of SRAM. Each sub-block can be power-gated under software control to optimize

power consumption.

2.3.3 Peripherals—real-time domain

2.3.3.1 Analog—real-time domain

The i.MX 8ULP Real-Time Domain implements the following analog peripherals:

• 12-bit Analog to Digital Converter

• 12-bit Digital to Analog Converter

• Comparators

See i.MX 8ULP modules list for more details.

2.3.3.2 Connectivity and communications—real-time domain

The i.MX 8ULP Real-Time Domain implements the following connectivity and communications peripherals:

NXP Semiconductors

Specifications

i.MX 8ULP Applications Processor—Industrial Products, Rev. 1, 09/2023

Data Sheet: Technical Data

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