ES9028Q2M datasheet(12/45 Pages) ESS

12 / 45 page

0.41

January 16, 2020

ES9028Q2M Datasheet

ESS TECHNOLOGY, INC. 109 Bonaventura Dr., San Jose, CA 95134, USA. Tel (408) 643-

8800 • WWW.ESSTECH.COM

SERIAL CONTROL INTERFACE

The registers inside the chip are programmed via an I2C interface. The diagram below shows the timing for this interface.

The chip address can be set to 2 different settings via the “ADDR” pin. The table below summarizes this.

ADDR

CHIP ADDRESS

0x90

0x92

Notes:

The “ADDR” pin is used to create the CHIP ADDRESS. (0x90, 0x92)

The first byte after the chip address is the “ADDRESS” this is the register address.

The second byte after the CHIP ADDRESS

is the “DATA” this is the data to be programmed into the register at the

previous “ADDRESS”.

Start

Stop

Parameter

Symbol

Standard

Mode

Fast-Mode

Unit

MIN

MAX

MIN

MAX

SCL Clock Frequency

fSCL

100

400

kHz

START condition hold time

tHD,STA

4.0

0.6

s

LOW period of SCL

tLOW

4.7

1.3

s

HIGH period of SCL

tHIGH

4.0

0.6

s

START condition setup time (repeat)

tSU,STA

4.7

0.6

s

SDA hold time from SCL falling

tHD,DAT

0.3

s

SDA setup time from SCL rising

tSU,DAT

250

100

Rise time of SDA and SCL

1000

300

Fall time of SDA and SCL

300

STOP condition setup time

tSU,STO

0.6

s

Bus free time between transmissions

tBUF

4.7

1.3

s

Capacitive load for each bus line

400

ES9028Q2M bảng dữ liệu(PDF) 12 Page - ESS Technology,Inc

ES9028Q2M bảng dữ liệu(HTML) 12 Page - ESS Technology,Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

bảng dữ liệu tải về

Link URL