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ES9028Q2M bảng dữ liệu(PDF) 9 Page - ESS Technology,Inc

tên linh kiện ES9028Q2M
Giải thích chi tiết về linh kiện  32-Bit Stereo Low Power Audio DAC
PDF  45 Pages
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nhà sản xuất  ESS [ESS Technology,Inc]
Trang chủ  http://www.esstech.com
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January 16, 2020
0.41
ES9028Q2M Datasheet
9
ESS TECHNOLOGY, INC. 109 Bonaventura Dr., San Jose, CA 95134, USA. Tel (408) 643-
8800 • WWW.ESSTECH.COM
The ES9028Q2M identifies under the following SLIMbus address space:
0x0145C0C70XYY where X is the device and YY is either 00 (ADDR = 0) or 01 (ADDR = 1).
Once the ES9028Q2M has reported that it is present, it is ready to stream audio to the data endpoint. The first step is to
assign logical addresses to each of the three devices initialized in the ES9028Q2M.
ASSIGN_LOGICAL_ADDRESS Dst = 0x0145C0C70000 LA = 5
ASSIGN_LOGICAL_ADDRESS Dst = 0x0145C0C70100 LA = 6
ASSIGN_LOGICAL_ADDRESS Dst = 0x0145C0C70300 LA = 8
For 44.1kHz audio, a root clock that is divisible by 44.1kHz is required. For this we can select the common SLIMbus clock of
22.5792MHz.
BEGIN_RECONFIGURATION
NEXT_ROOT_FREQUENCY RF = 2
RECONFIGURE_NOW
Now the source audio device is configured, which depends on the baseband or application processor used. Next the SINKs
are configured, assuming the same channel and port numbers are used (the same numbers should be used when
configuring the audio sources).
CONNECT_SINK Src = 0xFF, Dst = 6, CN = 1, PN = 0
CONNECT_SINK Src = 0xFF, Dst = 6, CN = 2, PN = 1
The type of audio to be transmitted on the selected channel(s) is now setup. For this example, the transmission is streaming
44.1KHz audio in isochronous mode.
BEGIN_RECONFIGURATION
NEXT_DEFINE_CHANNEL CN = 1, SD = 3140, TP = 0, SL = 6 (Channel 1, 3140 segment distribution, iso protocotol,
segment length 6)
NEXT_DEFINE_CONTENT CN = 1, FL = 1, PR = 11, AF = 0, DT = 1, CL = 0, DL = 6 (Channel 1, frequency locked, 44.1kHz,
LPCM audio, data length 6)
NEXT_ACTIVATE_CHANNEL CN = 1
RECONFIGURE_NOW
BEGIN_RECONFIGURATION
NEXT_DEFINE_CHANNEL CN = 2, SD = 3146, TP = 0, SL = 6 (Channel 2, 3146 segment distribution, iso protocotol,
segment length 6)
NEXT_DEFINE_CONTENT CN = 2, FL = 1, PR = 11, AF = 0, DT = 1, CL = 0, DL = 6 (Channel 1, frequency locked, 44.1kHz,
LPCM audio, data length 6)
NEXT_ACTIVATE_CHANNEL CN = 2
RECONFIGURE_NOW
Audio should now be configured to stream between the application processor.
Register reads and writes are also accomplished via SLIMbus by writing to 0x0145C0C703XX. Registers are offset from
byte address 0x900. For example, register 0 is at 0x900, register 1 is at 0x901, etc. An example of writing to register 1 is as
follows:
CHANGE_VALUE Src = 0xFF, Dst = 8, AM = 1, BA = 0x901, SS = 0, VU = 0xF2



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