ES9028Q2M datasheet(20/45 Pages) ESS

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January 16, 2020

ES9028Q2M Datasheet

ESS TECHNOLOGY, INC. 109 Bonaventura Dr., San Jose, CA 95134, USA. Tel (408) 643-

8800 • WWW.ESSTECH.COM

8-bit, Read-Write Register, Default = 0x40

Bits

[7]

[6]

[5]

[4]

[3]

[2]

[1]

[0]

Mnemonic

reserved *

bypass_thd

reserved *

Default

Bit

Mnemonic

Description

[7]

reserved

[6]

bypass_thd

1’b0: enable THD compensation

•

output = input + (input2) x thd_comp_c2 + (input3) x thd_comp_c3

•

thd_comp_c2 is stored in registers 23-22 (16 bits signed) (register 23 stores MSBs)

•

thd_comp_c3 is stored in registers 25-24 (16 bits signed) (register 25 stores MSBs)

1’b1: disable THD compensation (default)

•

PCM mode: output = input; DSD mode: output = input / 2

[5:0]

reserved

* All reserved Bits in Register #13 must be set to the indicated logic level to ensure correct device operation

THD compensation can be used to reduce the 2nd and 3rd harmonic distortion introduced by external output drivers.

A system level tuning is required to arrive at the optimum coefficients for thd_comp_c2 and thd_comp_c3.

Notes

•

To get the same gain (output = input) for PCM and DSD modes without THD compensation, bypass_thd should be set to

1’b0 with thd_comp_c2 and thd_comp_c3 set to 16’d0 (default)

•

Erroneous compensation can lead to higher distortion than the one without compensation. If accurate tuning cannot be

performed, thd_comp_c2 and thd_comp_c3 should be set to

16’d0 (default) if bypass_thd is set to 1’b0.

8 bit, Read-Write Register, Default = 0x8A

Bits

[7]

[6]

[5]

[4]

[3]

[2]

[1]

[0]

Mnemonic

soft_start

soft_start_on_lock

mute_on_lock

soft_start_time

Default

Bit

Mnemonic

Description

[7]

soft_start

’b0: Ramp the output stream to ground

’b1: Normal operation (default) – ramp the output stream to ½ x AVCC_L/R

[6]

soft_start_on_lock

1’b0: Do not force output low when lock is lost (default)

1’b1: Force output low when lock is lost

[5]

mute_on_lock

1’b0: Do not force a mute when lock is lost (default)

1’b1: Force a mute when lock is lost

[4:0]

soft_start_time

Time for soft start ramp

= 4096 x 2(soft_start_time+1) / MCLK seconds (where MCLK is measured in Hz).

The valid range of soft-start_time is from 0 to 20.

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