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M16C/62P bảng dữ liệu(PDF) 33 Page - Renesas Technology Corp |
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M16C/62P bảng dữ liệu(HTML) 33 Page - Renesas Technology Corp |
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33 / 87 page ![]() M16C/62 Group (M16C/62P, M16C/62PT) 5. Electrical Characteristics (M16C/62P) 4 8 f o 3 0 0 2 , 7 0 . v o N 0 1 . 2 . v e R page 33 Table 5.4 A-D Conversion Characteristics (1) Standard Min. Typ.Max. – INL Resolution Integral non- linearity error Bits VREF =VCC1 10 SymbolParameterMeasuring conditionUnit AN0 to AN7 input AN0_0 to AN0_7 input AN2_0 to AN2_7 input ANEX0, ANEX1 input VREF= VCC1= 5V LSB ±3 LSB ±7 LSB VREF =VCC1=3.3V 8 bit ±2 RLADDER tCONV Ladder resistance Conversion time(10bit), Sample & hold function available Reference voltage Analog input voltage k Ω µs V VIA VREF V 0 2.0 10 VCC1 VREF 40 2.75 Conversion time(8bit), Sample & hold function available µs 2.33 tCONV tSAMP Sampling time 0.25 µs VREF =VCC1 VREF =VCC1=5V, øAD=12MHz VREF =VCC1=5V, øAD=12MHz DNL Differential non-linearity error Offset error Gain error – – LSB LSB LSB ±1 ±3 ±3 NOTES: 1. Referenced to VCC1=AVCC=VREF=3.3 to 5.5V, VSS=AVSS=0V at Topr = -20 to 85 °C / -40 to 85 °C unless otherwise specified. 2. If VCC1 > VCC2, do not use AN0_0 to AN0_7 and AN2_0 to AN2_7 as analog input pins. 3. AD operation clock frequency (øAD frequency) must be 12 MHz or less. And divide the fAD if VCC1 is less than 4.0V, and øAD frequency into 10 MHz or less. 4. A case without sample & hold function turn øAD frequency into 250 kHz or more in addition to a limit of Note 3. A case with sample & hold function turn øAD frequency into 1MHz or more in addition to a limit of Note 3. 10 bit VREF= VCC1= 3.3V LSB ±5 LSB ±7 VREF= VCC1= 5V LSB ±3 LSB ±7 LSB VREF =VCC1=3.3V 8 bit ±2 10 bit VREF= VCC1= 3.3V LSB ±5 LSB ±7 – Absolute accuracy External operation amp connection mode AN0 to AN7 input AN0_0 to AN0_7 input AN2_0 to AN2_7 input ANEX0, ANEX1 input External operation amp connection mode AN0 to AN7 input AN0_0 to AN0_7 input AN2_0 to AN2_7 input ANEX0, ANEX1 input External operation amp connection mode AN0 to AN7 input AN0_0 to AN0_7 input AN2_0 to AN2_7 input ANEX0, ANEX1 input External operation amp connection mode Tolerance level impedance – 3k Ω Table 5.5 D-A Conversion Characteristics (1) Min. Typ. Max. – – tsu RO Resolution Absolute accuracy Setup time Output resistance Reference power supply input current Bits % k Ω mA IVREF 1.0 1.5 8 3 SymbolParameterMeasuring conditionUnit 20 10 4 µs (Note 2) Standard NOTES: 1. Referenced to VCC1=VREF=3.3 to 5.5V, VSS=AVSS=0V at Topr = -20 to 85 °C / -40 to 85 °C unless otherwise specified. 2. This applies when using one D-A converter, with the D-A register for the unused D-A converter set to “00h”. The A-D converter’s ladder resistance is not included. Also, when D-A register contents are not “00h”, the current IVREF always flows even though Vref may have been set to be unconnected by the A-D control register. |
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