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PIC16F15213 bảng dữ liệu(PDF) 13 Page - Microchip Technology |
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PIC16F15213 bảng dữ liệu(HTML) 13 Page - Microchip Technology |
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13 / 439 page ![]() ...........continued I/O 20-Pin PDIP SOIC SSOP 20-Pin VQFN ADC Reference Timers CCP 10-Bit PWM MSSP EUSART IOC Interrupt Basic VDD 1 18 — — — — — — — — — VDD VSS 20 17 — — — — — — — — — VSS OUT(2) — — — — TMR0 CCP1 CCP2 PWM3 PWM4 SCL1 SCK1 SDA1 SDO1 TX1 DT1 CK1 — — — Notes: 1. This is a PPS remappable input signal. The input function may be moved from the default location shown to any PORTx pin. 2. All output signals shown in this row are PPS remappable. 3. This is a bidirectional signal. For normal operation, user software must map this signal to the same pin via the PPS input and PPS output registers. 4. These pins can be configured for I2C or SMBus logic levels via the RxyI2C registers. The SCL1/SDA1 signals may be assigned to these pins for expected operation. PPS assignments of these signals to other pins will operate; however, the logic levels will be standard TTL/ST as selected by the INLVL register. PIC16F15213/14/23/24/43/44 Pin Allocation Tables © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 13 |
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