PIC16F15213 datasheet(96/439 Pages) MICROCHIP

96 / 439 page

12.9.5

PIR0

Name:

PIR0

Offset:

0x70C

Peripheral Interrupt Request Register 0

Bit

TMR0IF

IOCIF

INTF

Access

R/W/HS

Reset

Bit 5 – TMR0IF Timer0 Interrupt Flag

Value

Description

TMR0 register has overflowed (must be cleared by software)

TMR0 register has not overflowed

Bit 4 – IOCIF Interrupt-on-Change Flag(2)

Value

Description

One or more of the IOCAF-IOCCF register bits are currently set, indicating an enabled edge was

detected by the IOC module.

None of the IOCAF-IOCCF register bits are currently set

Bit 0 – INTF External Interrupt Flag(1)

Value

Description

External interrupt has occurred

External interrupt has not occurred

Notes:

The external interrupt INT pin is selected by INTPPS.

The IOCIF bit is the logical OR of all the IOCAF-IOCCF flags. Therefore, to clear the IOCIF flag, application

firmware must clear all of the lower level IOCAF-IOCCF register bits.

Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding

enable bit or the Global Interrupt Enable (GIE) bit. User software needs to ensure the appropriate interrupt flag

bits are cleared before enabling an interrupt.

PIC16F15213/14/23/24/43/44

Interrupts

and its subsidiaries

Data Sheet

DS40002195E-page 96

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