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PIC16F15213 bảng dữ liệu(PDF) 11 Page - Microchip Technology |
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PIC16F15213 bảng dữ liệu(HTML) 11 Page - Microchip Technology |
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11 / 439 page  3. Pin Allocation Tables Table 3-1. 8-Pin Allocation Table I/O 8-Pin PDIP SOIC DFN ADC Reference Timers CCP 10-Bit PWM MSSP EUSART IOC Interrupt Basic RA0 7 ANA0 — — — — — CK1(1,3) IOCA0 — ICSPDAT ICDDAT RA1 6 ANA1 VREF+ (ADC) — — — SCL1(1,3) SCK1(1,3) RX1(1) DT1(1,3) IOCA1 — ICSPCLK ICDCLK RA2 5 ANA2 — T0CKI(1) — — SDA1(1,3) SDI1(1,3) — IOCA2 INT(1) — RA3 4 — — — — — SS1(1) — IOCA3 — MCLR VPP RA4 3 ANA4 — T1G(1) — — — — IOCA4 — CLKOUT RA5 2 ANA5 ADACT(1) — T1CKI(1) T2IN(1) CCP1(1) CCP2(1) — — — IOCA5 — CLKIN VDD 1 — — — — — — — — — VDD VSS 8 — — — — — — — — — VSS OUT(2) — — — TMR0 CCP1 CCP2 PWM3 PWM4 SCL1 SCK1 SDA1 SDO1 TX1 DT1 CK1 — — — Notes: 1. This is a PPS remappable input signal. The input function may be moved from the default location shown to any PORTx pin. 2. All output signals shown in this row are PPS remappable. 3. This is a bidirectional signal. For normal operation, user software must map this signal to the same pin via the PPS input and PPS output registers. Table 3-2. 14/16-Pin Allocation Table I/O 14-Pin PDIP SOIC TSSOP 16-Pin QFN ADC Reference Timers CCP 10-Bit PWM MSSP EUSART IOC Interrupt Basic RA0 13 12 ANA0 — — — — — — IOCA0 — ICSPDAT ICDDAT RA1 12 11 ANA1 VREF+ (ADC) — — — — — IOCA1 — ICSPCLK ICDCLK RA2 11 10 ANA2 — T0CKI(1) — — — — IOCA2 INT(1) — RA3 4 3 — — — — — — — IOCA3 — MCLR VPP RA4 3 2 ANA4 — T1G(1) — — — — IOCA4 — CLKOUT RA5 2 1 ANA5 — T1CKI(1) T2IN(1) — — — — IOCA5 — CLKIN RC0 10 9 — — — — — SCL1(1,3,4) SCK1(1,3,4) — IOCC0 — — RC1 9 8 — — — — — SDA1(1,3,4) SDI1(1,3,4) — IOCC1 — — RC2 8 7 ANC2 ADACT(1) — — — — — — IOCC2 — — RC3 7 6 ANC3 — — CCP2(1) — SS1(1) — IOCC3 — — RC4 6 5 ANC4 — — — — — CK1(1,3) IOCC4 — — PIC16F15213/14/23/24/43/44 Pin Allocation Tables © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 11 |
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