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SPC574S60 bảng dữ liệu(PDF) 46 Page - STMicroelectronics

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Electrical characteristics
SPC574Sx
46/77
DS10601 Rev 6
tESRT
Erase suspend request
rate(10)
500
T
—
—
—
—
—
— µs
tPSRT
Program suspend request
rate(10)
30
T
—
—
—
—
—
— µs
tAMRT
Array Integrity Check - Margin
Read suspend request rate
15
T
—
—
—
—
—
— µs
tPSUS
Program suspend latency(11)
——
—
—
—
—
15
T
µs
tESUS
Erase suspend latency(11)
——
—
—
—
—
30
T
µs
tAIC0S
Array Integrity Check (1.5 MB,
sequential)(12)
15
T
—
—
—
—
—
—
— ms
tAIC256KS
Array Integrity Check (256
KB, sequential)(12)
2.5
T
—
—
—
—
—
—
— ms
tAIC0P
Array Integrity Check (1.5 MB,
proprietary)(12)
2.0
T
—
—
—
—
—
—
—
s
tMR0S
Margin Read (1.5 MB,
sequential)(12)
75
T
—
—
—
—
—
—
— ms
tMR256KS
Margin Read (256 KB,
sequential)(12)
12.5
T
—
—
—
—
—
—
— ms
1. Characteristics are valid both for Data Flash and Code Flash, unless specified in the characteristics column.
2. Actual hardware programming times; this does not include software overhead.
3. Typical program and erase times assume nominal supply values and operation at 25 °C. All times are subject to change
pending device characterization.
4. Typical End of Life program and erase times represent the median performance and assume nominal supply values.
Typical End of Life program and erase values may be used for throughput calculations. These values are characteristic, but
not tested.
5. Lifetime maximum program & erase times apply across the voltages and temperatures and occur after the specified
number of program/erase cycles. These maximum values are characterized but not tested or guaranteed.
6. Initial factory condition: < 100 program/erase cycles, 20 °C < TJ < 30 °C junction temperature, and nominal (± 2%) supply
voltages. These values are verified at production testing.
7. Initial maximum “All temp” program and erase times provide guidance for time-out limits used in the factory and apply for
less than or equal to 100 program or erase cycles, –40 °C < TJ < 150 °C junction temperature, and nominal (± 2%) supply
voltages. These values are verified at production testing.
8. Rate computed based on 256 KB sectors.
9. Only code sectors, not including EEPROM.
10. Time between suspend resume and next suspend. Value stated actually represents Min value specification.
11. Timings guaranteed by design.
12. AIC is done using system clock, thus all timing is dependent on system frequency and number of wait states. Timing in the
table is calculated at max frequency.
Table 28. Flash memory program and erase specifications (continued)
Symbol
Characteristics(1)(2)
Value
Unit
Typ(3) C
Initial max
Typical
end of
life(4)
Lifetime
max(5)
C
25 °C
(6)
All
temp
(7)
C
< 1 K
cycles
< 100 K
cycles



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